CS44800-CQZ Cirrus Logic Inc, CS44800-CQZ Datasheet - Page 69

• Manufacturer Part Number: CS44800-CQZ
• Description: IC,Audio Power Amplifier Controller,CMOS,QFP,64PIN
• Manufacturer: Cirrus Logic Inc
• Type: Digital Amplifier Controllerr

Specifications of CS44800-CQZ

• Applications: Automotive Systems
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1532 - BOARD EVAL FOR CS44800 PWM CTRL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1070

DS632F1
7.29.4 Channel A3 Output Configuration (A3_OUT_CNFG)
7.29.5 Channel B3 Output Configuration (B3_OUT_CNFG)
7.29.6 Channels A4 and B4 Output Configuration (A4/B4_OUT_CNFG)
7.30
7.30.1 Disable PWMOUTXX - Signal (DISABLE_PWMOUTXX-)
DISABLE_PWMOUTXX- RESERVED
PWM Minimum Pulse Width Register (address 32h)
er-down state by setting the PDN bit in the register
on page 51
Default = 0
0 - pwm outputs for channel A3 are configured for half-bridge operation
1 - pwm outputs for channel A3 are configured for full-bridge operation
Function:
Identifies the output configuration. The value selected for this bit is applicable to the outputs for only chan-
nel A3. This parameter can only be changed when all modulators and associated logic are in the power
down state by setting the PDN bit in the register
on page 51
Default = 0
0 - pwm outputs for channel B3 are configured for half-bridge operation
1 - pwm outputs for channel B3 are configured for full-bridge operation
Function:
Identifies the output configuration. The value selected for this bit is applicable to the outputs for only chan-
nel B3. This parameter can only be changed when all modulators and associated logic are in the power-
down state by setting the PDN bit in the register
on page 51
7
Default = 0
0 - PWM minus (“-”) differential signal is operational when PWM channel is configured for half-bridge.
1 - PWM minus (“-”) differential signal is disabled when PWM channel is configured for half-bridge.
Function:
Determines if the PWM minus (“-”) differential signal is disabled when the particular PWM channel is con-
figured for half-bridge operation. This bit is ignored for channels configured for full-bridge operation. The
value selected for this bit is applicable to the outputs for all channels configured for half-bridge operation.
This parameter can only be changed when all modulators and associated logic are in the power-down
Default = 0
0 - pwm outputs for both channels A4 and B4 are configured for half-bridge operation
1 - pwm outputs for both channels A4 and B4 are configured for full-bridge operation
Function:
Identifies the output configuration. The value selected for this bit is applicable to the outputs for chan-
nels A4 and B4. This parameter can only be changed when all modulators and associated logic are
in the power down state by setting the PDN bit in the register
(address 02h)” on page 51
ignored.
to a 1b. Attempts to write this register while the PDN is not set will be ignored.
to a ‘1’b. Attempts to write this register while the PDN is not set will be ignored.
to a 1b. Attempts to write this register while the PDN is not set will be ignored.
6
RESERVED MIN_PULSE4 MIN_PULSE3
5
to a ‘1’b. Attempts to write this register while the PDN is not set will be
4
“Clock Configuration and Power Control (address 02h)”
“Clock Configuration and Power Control (address 02h)”
“Clock Configuration and Power Control (address 02h)”
3
MIN_PULSE2
“Clock Configuration and Power Control
2
MIN_PULSE1
1
CS44800
MIN_PULSE0
0
69