PIC18C601-I/PT Microchip Technology, PIC18C601-I/PT Datasheet - Page 65
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18C601-I/PT
Manufacturer Part Number
PIC18C601-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18C601-IL.pdf
(320 pages)
3.PIC18C601-IL.pdf
(10 pages)
4.PIC18C601-IL.pdf
(10 pages)
Specifications of PIC18C601-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Type
ROMless
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Program Memory Size
256 KB
Data Ram Size
1.5 KB
Interface Type
3-Wire, I2C, SPI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C601I/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C601-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18C601-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18C601-IL PDF datasheet #2
- PIC18C601-IL PDF datasheet #3
- PIC18C601-IL PDF datasheet #4
- Current page: 65 of 320
- Download datasheet (6Mb)
FIGURE 5-2:
5.2.2
The 8-bit De-Multiplexed mode applies only to the
PIC18C801. Data and address lines are available sep-
arately. External components are not necessary in this
mode.
For 8-bit De-Multiplexed mode on the PIC18C801, the
instructions are fetched as two 8-bit bytes on a dedi-
cated data bus (PORTJ). The address will be pre-
sented for the entire duration of the fetch cycle on a
separate address bus. The two instruction bytes are
sequentially fetched within one instruction cycle (T
Therefore, the designer must choose external memory
devices according to timing calculations, based on 1/2
T
selection, setup and hold times must be considered.
CY
2001 Microchip Technology Inc.
(2 times instruction rate). For proper memory speed
A16, AD<15:8>
8-BIT DE-MULTIPLEXED MODE
AD<7:0>
ALE
BA0
OE
8-BIT MULTIPLEXED MODE TIMING
Q1
Advance Information
ABh
CY
).
Q2
Opcode Fetch
from 007556h
MOVLW 55h
The Address Latch Enable (ALE) pin is left uncon-
nected, since glue logic is not necessary. The OE out-
put enable signal will enable one byte of program
memory for a portion of the instruction cycle, then BA0
will change and the second byte will be enabled to form
the 16-bit instruction word. The least significant bit of
the address, BA0, must be connected to the memory
devices in this mode. Figure 5-3 shows an example of
8-bit De-Multiplexed mode on the PIC18C801. The
control signals used in 8-bit De-Multiplexed mode are
outlined in Register 5-2. Register 5-4 describes 8-bit
De-Multiplexed mode timing.
03Ah
Q3
55h
PIC18C601/801
Q4
0Eh
DS39541A-page 65
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