PIC18C601-I/PT Microchip Technology, PIC18C601-I/PT Datasheet - Page 75
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18C601-I/PT
Manufacturer Part Number
PIC18C601-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18C601-IL.pdf
(320 pages)
3.PIC18C601-IL.pdf
(10 pages)
4.PIC18C601-IL.pdf
(10 pages)
Specifications of PIC18C601-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Type
ROMless
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Program Memory Size
256 KB
Data Ram Size
1.5 KB
Interface Type
3-Wire, I2C, SPI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C601I/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C601-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18C601-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18C601-IL PDF datasheet #2
- PIC18C601-IL PDF datasheet #3
- PIC18C601-IL PDF datasheet #4
- Current page: 75 of 320
- Download datasheet (6Mb)
6.2
The TBLRD instruction is used to retrieve data from
external program memory and place it into data
memory.
TBLPTR points to a byte address in external program
memory space. Executing TBLRD places the byte into
TABLAT. In addition, TBLPTR can be modified auto-
matically for the next Table Read operation.
EXAMPLE 6-1:
FIGURE 6-3:
; Read a byte from location 0020h
CLRF
CLRF
MOVLW
MOVWF
TBLRD*
2001 Microchip Technology Inc.
AD<7:0>
A<15:8>
Instruction
Execution
Memory
WRH
Cycle
WRL
BA0
ALE
Table Read
OE
TBLPTRU
TBLPTRH
20h
TBLPTRL
’1’
’1’
Q1
AAh
Opcode Fetch
TABLE READ CODE EXAMPLE
TBLRD EXTERNAL INTERFACE TIMING (8-BIT MULTIPLEXED MODE)
from 007554h
INST(PC-2)
Q2
TBLRD*
03Ah
Q3
08h
; clear upper 5 bits of TBLPTR
; clear higher 8 bits of TBLPTR
; Load 20h into
; TBLPTRL
; Data is in TABLAT
Q4
00h
Q1
Advance Information
ABh
TBLRD Cycle1
Opcode Fetch
from 007556h
MOVLW 55h
Q2
03Ah
Q3
55h
Q4
0Eh
Table Reads from external program memory are
performed one byte at a time. If the external interface is
8-bit, the bus interface circuitry in TABLAT will load the
external value into TABLAT. If the external interface is
16-bit, interface circuitry in TABLAT will select either the
high or low byte of the data from the 16-bit bus, based
on the least significant bit of the address.
Example 6-1describes how to use TBLRD. Figure 6-3
and Figure 6-4 show Table Read timings for an 8-bit
external interface, and Figure 6-5 describes Table
Read timing for a 16-bit interface.
Q1
33h
from 199E67h
TBLRD Cycle2
TABLRD 92h
Q2
CCFh
Q3
PIC18C601/801
92h
Q4
Q1
ACh
Opcode Fetch
from 007558h
ADDLW 55h
Q2
MOVLW
03Ah
Q3
55h
DS39541A-page 75
Q4
0Fh
’1’
’1’
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