PIC18LF4480-I/P Microchip Technology, PIC18LF4480-I/P Datasheet - Page 324
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,40PIN,PLASTIC](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18LF4480-I/P
Manufacturer Part Number
PIC18LF4480-I/P
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,40PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4480-IPT.pdf
(490 pages)
4.PIC18LF2480-ISP.pdf
(14 pages)
Specifications of PIC18LF4480-I/P
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF4480-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4480-IPT PDF datasheet #3
- PIC18LF2480-ISP PDF datasheet #4
- Current page: 324 of 490
- Download datasheet (9Mb)
PIC18F2480/2580/4480/4580
REGISTER 24-59: TXBIE: TRANSMIT BUFFERS INTERRUPT ENABLE REGISTER
REGISTER 24-60: BIE0: BUFFER INTERRUPT ENABLE REGISTER 0
DS39637D-page 324
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-2
bit 1-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
Note 1:
B5IE
R/W-0
U-0
—
2:
2:
(2)
This register is available in Mode 1 and 2 only.
TXBnIE in PIE3 register must be set to get an interrupt.
This register is available in Mode 1 and 2 only.
Either TXBnIE or RXBnIE in the PIE3 register must be set to get an interrupt.
Unimplemented: Read as ‘0’
TXB2IE:TXB0IE: Transmit Buffer 2-0 Interrupt Enable bits
1 = Transmit buffer interrupt is enabled
0 = Transmit buffer interrupt is disabled
Unimplemented: Read as ‘0’
B5IE:B0IE: Programmable Transmit/Receive Buffer 5-0 Interrupt Enable bits
1 = Interrupt is enabled
0 = Interrupt is disabled
RXB1IE:RXB0IE: Dedicated Receive Buffer 1-0 Interrupt Enable bits
1 = Interrupt is enabled
0 = Interrupt is disabled
B4IE
R/W-0
U-0
—
(2)
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
B3IE
R/W-0
U-0
—
(2)
TXB2IE
B2IE
R/W-0
R/W-0
(2)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TXB1IE
B1IE
R/W-0
R/W-0
(2)
(2)
(2)
TXB0IE
B0IE
R/W-0
R/W-0
(1)
(2)
(2)
(2)
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
RXB1IE
R/W-0
(2)
U-0
—
(1)
(2)
RXB0IE
R/W-0
U-0
—
bit 0
bit 0
(2)
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