PIC18LF4480-I/P Microchip Technology, PIC18LF4480-I/P Datasheet - Page 334
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,40PIN,PLASTIC](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18LF4480-I/P
Manufacturer Part Number
PIC18LF4480-I/P
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,40PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4480-IPT.pdf
(490 pages)
4.PIC18LF2480-ISP.pdf
(14 pages)
Specifications of PIC18LF4480-I/P
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF4480-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4480-IPT PDF datasheet #3
- PIC18LF2480-ISP PDF datasheet #4
- Current page: 334 of 490
- Download datasheet (9Mb)
PIC18F2480/2580/4480/4580
24.6.3
Transmit
PIC18F2480/2580/4480/4580 devices of the pending
transmittable messages. This is independent from and
not related to any prioritization implicit in the message
arbitration scheme built into the CAN protocol. Prior to
sending the Start-Of-Frame (SOF), the priority of all
buffers that are queued for transmission is compared.
FIGURE 24-2:
DS39637D-page 334
Message
priority
Control
TRANSMIT PRIORITY
Queue
TXB0
is
TRANSMIT BUFFERS
a
prioritization
within
TXB1
the
Transmit Byte Sequencer
The transmit buffer with the highest priority will be sent
first. If two buffers have the same priority setting, the
buffer with the highest buffer number will be sent first.
There are four levels of transmit priority. If the TXP bits
for a particular message buffer are set to ‘11’, that buf-
fer has the highest possible priority. If the TXP bits for
a particular message buffer are set to ‘00’, that buffer
has the lowest possible priority.
TXB2
© 2009 Microchip Technology Inc.
TXB3 - TXB8
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