PIC18LF6310T-I/PT Microchip Technology, PIC18LF6310T-I/PT Datasheet - Page 164
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18LF6310T-I/PT
Manufacturer Part Number
PIC18LF6310T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Specifications of PIC18LF6310T-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF6310T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F6310/6410/8310/8410
15.1
Timer3 can operate in one of three modes:
• Timer
• Synchronous counter
• Asynchronous counter
The operating mode is determined by the clock select
bit, TMR3CS (T3CON<1>). When TMR3CS is cleared
(= 0), Timer3 increments on every internal instruction
FIGURE 15-1:
FIGURE 15-2:
DS39635C-page 164
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
Timer3 Operation
T1OSI
T1OSI
CCP1/CCP2 Special Event Trigger
CCP1/CCP2 Special Event Trigger
T1OSCEN
T3CKPS<1:0>
T3SYNC
TMR3ON
Timer1 Oscillator
Timer1 Oscillator
TIMER3 BLOCK DIAGRAM
TIMER3 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
T1OSCEN
T3CKPS<1:0>
T3SYNC
TMR3ON
(1)
(1)
TCCPx
TCCPx
TMR3CS
TMR3CS
Clock
Clock
Internal
Internal
F
F
OSC
OSC
/4
/4
1
0
1
0
Timer1 clock input
Clear TMR3
Clear TMR3
Prescaler
Prescaler
1, 2, 4, 8
1, 2, 4, 8
cycle (F
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
As with Timer1, the RC1/T1OSI and RC0/T1OSO/
T13CKI pins become inputs when the Timer1 oscillator
is enabled. This means the values of TRISC<1:0> are
ignored and the pins are read as ‘0’.
2
2
OSC
TMR3L
TMR3L
/4). When the bit is set, Timer3 increments
8
Sleep Input
8
Synchronize
Synchronize
Sleep Input
Detect
Detect
High Byte
High Byte
TMR3H
TMR3
TMR3
8
2010 Microchip Technology Inc.
8
8
Internal Data Bus
1
0
1
0
Read TMR3L
Write TMR3L
on Overflow
on Overflow
TMR3IF
TMR3IF
Set
Set
Timer3
Timer3
On/Off
On/Off
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