PIC18LF6310T-I/PT Microchip Technology, PIC18LF6310T-I/PT Datasheet - Page 173
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PIC18LF6310T-I/PT
Manufacturer Part Number
PIC18LF6310T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Specifications of PIC18LF6310T-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF6310T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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16.4
In Pulse-Width Modulation (PWM) mode, the CCP2 pin
produces up to a 10-bit resolution PWM output. Since
the CCP2 pin is multiplexed with a PORTC or PORTE
data latch, the appropriate TRIS bit must be cleared to
make the CCP2 pin an output.
Figure 16-4
CCP module in PWM mode.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, see
“Setup for Pwm
FIGURE 16-4:
2010 Microchip Technology Inc.
Note 1: The 8-bit TMR2 value is concatenated with the 2-bit
Note:
CCPR1H (Slave)
CCPR1L
Comparator
Duty Cycle Registers
TMR2
PR2
Comparator
PWM Mode
internal Q clock, or 2 bits of the prescaler, to create the
10-bit time base.
Clearing the CCP2CON register will force
the RC1 or RE7 output latch (depending
on device configuration) to the default low
level. This is not the PORTC or PORTE
I/O data latch.
shows a simplified block diagram of the
(Note 1)
Operation”.
Clear Timer,
CCP1 pin and
latch D.C.
SIMPLIFIED PWM BLOCK
DIAGRAM
CCP1CON<5:4>
R
S
Q
TRISC<2>
Section 16.4.3
RC2/CCP1
PIC18F6310/6410/8310/8410
A PWM output
and a time that the output stays high (duty cycle). The
frequency of the PWM is the inverse of the period
(1/period).
FIGURE 16-5:
16.4.1
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following formula:
EQUATION 16-1:
PWM frequency is defined as 1/[PWM period].
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCP2 pin is set (exception: if PWM duty
• The PWM duty cycle is latched from CCPR2L into
cycle = 0%, the CCP2 pin will not be set)
CCPR2H
Note:
PWM Period = (PR2) + 1] • 4 • T
TMR2 = PR2
Duty Cycle
PWM PERIOD
The
Section 14.0 “Timer2
used in the determination of the PWM
frequency. The postscaler could be used
to have a servo update rate at a different
frequency than the PWM output.
(Figure
Period
TMR2 = Duty Cycle
Timer2
(TMR2 Prescale Value)
PWM OUTPUT
16-5) has a time base (period)
TMR2 = PR2
postscalers
Module”) are not
DS39635C-page 173
OSC
•
(see
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