EVAL-AD7747EBZ Analog Devices Inc, EVAL-AD7747EBZ Datasheet - Page 5

24-Bit Capacitance-to-Digital Converter Eval. Board

EVAL-AD7747EBZ

Manufacturer Part Number
EVAL-AD7747EBZ
Description
24-Bit Capacitance-to-Digital Converter Eval. Board
Manufacturer
Analog Devices Inc
Datasheets

Specifications of EVAL-AD7747EBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Capacitance-to-Digital Converter
Kit Application Type
Data Converter
Silicon Core Number
AD7747
Sensor Type
Touch, Capacitive
Interface
I²C
Voltage - Supply
2.7 V ~ 5.25 V
Embedded
No
Utilized Ic / Part
AD7747
Kit Contents
Board
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Sensing Range
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EVAL-AD7747EBZ
Manufacturer:
Analog Devices Inc
Quantity:
135
TIMING SPECIFICATIONS
V
Table 2.
Parameter
SERIAL INTERFACE
1
2
Sample tested during initial release to ensure compliance.
All input signals are specified with input rise/fall times = 3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and outputs.
Output load = 10 pF.
DD
SCL Frequency
SCL High Pulse Width, t
SCL Low Pulse Width, t
SCL, SDA Rise Time, t
SCL, SDA Fall Time, t
Hold Time (Start Condition), t
Setup Time (Start Condition), t
Data Setup Time, t
Setup Time (Stop Condition), t
Data Hold Time, t
Bus-Free Time (Between Stop and Start Condition, t
= 2.7 V to 3.6 V, or 4.75 V to 5.25 V; GND = 0 V; Input Logic 0 = 0 V; Input Logic 1 = V
SDA
SCL
1, 2
P
HD;DAT
SU;DAT
t
BUF
F
R
LOW
(Master)
S
HIGH
t
HD;STA
HD;STA
SU;STO
SU;STA
t
LOW
t
R
t
HD;DAT
Figure 2. Serial Interface Timing Diagram
BUF
)
t
HIGH
t
F
t
Rev. 0 | Page 5 of 28
Min
0
0.6
1.3
0.6
0.6
0.1
0.6
0
1.3
SU;DAT
Typ
Max
400
0.3
0.3
S
t
Unit
kHz
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
SU;STA
t
HD;STA
DD
; −40°C to +125°C, unless otherwise noted.
Test Conditions/Comments
See Figure 2
After this period, the first clock is generated
Relevant for repeated start condition
t
SU;STO
P
AD7747

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