EVAL-ADF4360-7EBZ1 Analog Devices Inc, EVAL-ADF4360-7EBZ1 Datasheet - Page 22

PLL/Frequency Synthesizer EVAL BOARD

EVAL-ADF4360-7EBZ1

Manufacturer Part Number
EVAL-ADF4360-7EBZ1
Description
PLL/Frequency Synthesizer EVAL BOARD
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-ADF4360-7EBZ1

Silicon Manufacturer
Analog Devices
Application Sub Type
Integer-N Synthesizer
Kit Application Type
Clock & Timing
Silicon Core Number
ADF4360-7
Kit Contents
Board
Main Purpose
Timing, Frequency Synthesizer
Embedded
No
Utilized Ic / Part
ADF4360-7
Primary Attributes
Single Integer-N PLL with VCO
Secondary Attributes
900MHz, 200kHz PFD
Frequency
1.8GHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
EVAL-ADF4360-7EB1
EVAL-ADF4360-7EB1
Q5173330
Q5652985
ADF4360-7
CHOOSING THE CORRECT INDUCTANCE VALUE
The ADF4360-7 can be used at many different frequencies
simply by choosing the external inductors to give the correct
output frequency. Figure 24 shows a graph of both minimum
and maximum frequency vs. the external inductor value. The
correct inductor should cover the maximum and minimum
frequencies desired. The inductors used are the 0402 CS type
from Coilcraft. To reduce mutual coupling, the inductors should
be placed at right angles to one another.
As shown in Figure 24, the lowest commercially available value
of inductance, 1.0 nH, sets the center frequency at approxi-
mately 1300 MHz. For inductances less than 2.4 nH, a PCB
trace should be used, a direct short. The lowest center
frequency of oscillation possible is approximately 350 MHz,
which is achieved using 30 nH inductors. This relationship
can be expressed by
where F
tance.
The approximate value of capacitance at the midpoint of the
center band of the VCO is 6.2 pF, and the approximate value of
internal inductance due to the bond wires is 0.9 nH. The VCO
sensitivity is a measure of the frequency change vs. the tuning
voltage. It is a very important parameter for the low-pass filter.
Figure 25 shows a graph of the tuning sensitivity (in MHz/V) vs.
the inductance (nH). It can be seen that as the inductance
increases, the sensitivity decreases. This relationship can be
derived from the previous equation, i.e., because the inductance
has increased, the change in capacitance from the varactor has
less of an effect on the frequency.
F
1500
1400
1300
1200
1100
1000
Figure 24. Output Center Frequency vs. External Inductor Value
O
900
800
700
600
500
400
300
O
=
is the center frequency, and L
0
6.2
5
pF
(
0.9
1
nH
EXT INDUCTANCE (nH)
10
+
L
EXT
15
)
EXT
20
is the external induc-
25
30
Rev. A | Page 22 of 28
FIXED FREQUENCY LO
Figure 26 shows the ADF4360-7 used as a fixed frequency LO at
500 MHz. The low-pass filter was designed using ADIsimPLL
for a channel spacing of 8 MHz and an open-loop bandwidth of
30 kHz. The maximum PFD frequency of the ADF4360-7 is
8 MHz. Because using a larger PFD frequency allows the use of
a smaller N, the in-band phase noise is reduced to as low as
possible, −109 dBc/Hz. The typical rms phase noise (100 Hz to
100 kHz) of the LO in this configuration is 0.3°. The reference
frequency is from a 16 MHz TCXO from Fox; thus, an R value of
2 is programmed. Taking into account the high PFD frequency
and its effect on the band select logic, the band select clock
divider is enabled. In this case, a value of 8 is chosen. A very sim-
ple pull-up resistor and dc blocking capacitor complete the RF
output stage.
801BE-160
16MHz
FOX
1nF
10µF
Figure 25. Tuning Sensitivity (in MHz/V) vs. Inductance (nH)
35
30
25
20
15
10
5
0
1nF
4.7kΩ
0
1nF
51Ω
14
16
17
18
19
12
13
CPGND
C
REF
CLK
DATA
LE
C
R
1
V
V
N
C
SET
VCO
VCO
6
IN
Figure 26. Fixed Frequency LO
3
10
DV
8
21
DD
AGND DGND L
EXT INDUCTANCE (nH)
11 22 15
ADF4360-7
AV
V
VDD
2
DD
470Ω
CE MUXOUT
23
20
DETECT
LOCK
9
1
20
L
10
13nH
2
13nH
470Ω
RF
RF
V
OUT
OUT
TUNE
CP
A
B
24
7
4
5
30
V
2.7nF
VCO
51Ω
510Ω
27nF
51Ω
910Ω
40
100pF
100pF
820pF

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