5XX MOTHERBOARD ONLY AXIOM, 5XX MOTHERBOARD ONLY Datasheet - Page 11

• Manufacturer Part Number: 5XX MOTHERBOARD ONLY
• Description: CMD-5XX MOTHERBOARD ONLY
• Manufacturer: AXIOM

Specifications of 5XX MOTHERBOARD ONLY

• Silicon Manufacturer: Freescale
• Core Architecture: Power
• Core Sub-architecture: PowerPC
• Features: Plug And Play, Axiom Monitor, Communication Interfaces, Keypad And LCD Module Support
• Kit Contents: Board
• Silicon Core Number: MPC555, MPC556, MPC561
• Silicon Family Name: MPC5xx

Option Switches and Jumpers
Mode Switch 1-4 External Reset Configuration Options
Mode Switches 1, 2, 3
or low level when off and a logic 1 or high level when on. The configuration is only presented to the data bus during Hard Reset if
External Configuration is enabled with the CFG_EN option jumper installed and the External Configuration switch enabled on the
PM-5xx module. The Hard Reset Configuration Word options are all defaulted to logic 0 when the Mode Switches are in the OFF
position. For more information on the MPC5xx Reset Configuration refer to the Reset Chapter in the respective MPC5xx technical
manual. The following tables represent common configuration items and should be verified against the MPC5xx installed.
Mode Switch 1
Mode Switch 2
Mode Switch 3
Mode Switch 4
CFG_EN Jumper
Enables/Disables External Reset Configuration drivers on the CMD5xx board. When installed, this jumper will connect the
EXCNF* signal from the PM-5xx module to the External Reset Configuration Word buffers and allow the Configuration word to be
driven onto the data bus during SRESET Condition. Removing this jumper will disable the Reset Configuration Word from being
driven on to the data bus. The jumper should be installed until the internal Hard Reset Configuration Word is programmed into the
MPC5xx internal flash memory of the microcontroller operating the board. This can be done from the utilities supplied with the
board in U15/U16.
5, 6, 7
5, 6
2, 3
6, 7
1, 2
2,3
1
2
3
4
7
8
1
4
5
8
1
4
5
6
7
8
3
4
8
Register Bit
Register Bit
Register Bit
EXC_COMP
Register Bit
EN_COMP
DBGC[0:1]
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
MSR[IP]
Control
Control
Control
Control
SC[0:1]
ATWC
OERC
PRPM
EARB
BDRV
DBPC
EBDF
ETRC
FLEN
BDIS
DME
BPS
ISB
and
4
configure the external Hard Reset Configuration Word when enabled. These switches provide a logic 0
Internal or External Arbitration
Initial Interrupt Prefix
Bus Pin Drive Strength
Memory Controller Disable
Boot Port Size: Off/Off = 32Bit Port, Off/On = 8 Bit Port
Future Use
Future Use
Future Use
Debug Pins Configuration
Debug Port Pins Configuration
Address Type / Write Enable Pins Configuration
External Bus Division Factor
Future Use
Peripheral Mode Enable
Single Chip Select, Off/On = 16 bit bus, On/Off = Single-chip w/ Show
cycles, On/On = Single-Chip
Exception Table Relocation
Internal CMFI Flash enable
Enable Code Compression ** Must be supported by processor.
Enable Exception Compression *** Must be supported by processor
Future Use
Other Exception Relocation Control ** ERTC on for any effect
Future Use
Future Use
Internal Space Base Select
Dual Mapping Enable
Reset Function
Reset Function
Reset Function
Reset Function
11
Off = VFLS[0:1], BR, BG, BB, BI
Off = DSCK, DSDO, DSDI
Off = WE/BE[0:3]
Off = Equal to CLKOUT
Off
Off = Internal
Off = 0
Off = Full Drive
Off = Enabled
On/Off = 16 Bit Port
Off
Off
Off , Off = 0x00 offset
Off
Off
Off, Off, Off = 0x00000000
Off = No Dual Mapping
Default Position
Off = Not Peripheral
Off/Off = 32 bit bus
Off = Disabled
On = Enabled
Off = No compression
Off = No compression
Off
Default Position
Default Position
Default Position
CMD-5xx 08/07/02