5XX MOTHERBOARD ONLY AXIOM, 5XX MOTHERBOARD ONLY Datasheet - Page 20

• Manufacturer Part Number: 5XX MOTHERBOARD ONLY
• Description: CMD-5XX MOTHERBOARD ONLY
• Manufacturer: AXIOM

Specifications of 5XX MOTHERBOARD ONLY

• Silicon Manufacturer: Freescale
• Core Architecture: Power
• Core Sub-architecture: PowerPC
• Features: Plug And Play, Axiom Monitor, Communication Interfaces, Keypad And LCD Module Support
• Kit Contents: Board
• Silicon Core Number: MPC555, MPC556, MPC561
• Silicon Family Name: MPC5xx

TROUBLESHOOTING
The MEM bank should contain the “Axiom MON5xx” EPROM’s and this bank only should be assigned CS0 to boot.
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and this bank only should be assigned CS0 to boot.
1. If trying to boot from external EPROM devices (U15 and U16) be sure the following are all true:
2.
3.
4.
5.
6.
7.
8.
9.
10. If you want to re-map one of the external memory devices (flash for example) to the 0x0000 address space you may have
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processor from resetting properly. For this reason, you may need to disconnect the BDM device before applying power to
the board. The RESET LED should flash briefly when the PWR_ON RESET switch is pressed and released - indicating a
proper reset condition. The BDM can then be connected to the board and should communicate properly.
select jumpers on the board (MAP Switch) should be set to match the corresponding chip select registers (BR0-3, OR0-3)
in your software.
configured as such. For example, the 32-bit version of the sample monitor program writes 0x400003 to the CS0 Base
address register, while the 16-bit version writes 0x400803 to keep the proper bus width.
provided).
by trying to access "un-mapped" or improperly configured memory addresses. Look at the Memory Map page of this
manual for the default memory map as set by the monitor program. Memory device location and address range is all
configured under your software control at run-time (or the BDM configuration registers if using a BDM). These registers
include the BR0 - BR3 registers as well as the OR0 - OR3 registers. Consult microcontroller manual for more information
on these registers.
0x00400000 memory blocks. If booting externally (from CS0) your software must be located at a valid address when it
changes the BR0 register. For example: The MPC555 resets at address 0x0100. The monitor starts at the first 40 0000
block following the internal block (see memory map). When the MPC555 resets, the code in the CS0 device - in this case
the monitor - is mirrored to every 40 0000 block in the map. This allows the monitor to jump to the __start address + 40
0000. The monitor initialization code then re-maps CS0 to address 40 0000 and everything works ok.
an address conflict with the internal CMFI flash memory. To make this work you must disable the onchip flash (see the
FLEN bit of the IMMR register in the MPC5xx documentation). You can then relocate your code with interrupt handlers at
0x0, running out of external memory. Writing 0xFFF00000 to the SPR638 register in your BDM configuration file does
this so you can debug external memory mapped at the 0x0 address space.
If trying to boot from onboard FLASH devices (U15 and U16) be sure the following are all true:
BDM hardware can cause a small amount of power to be supplied to the micro while connected, and thus prevent the
Make sure the PM-5xx module is properly seated by pressing down firmly on the center of the microcontroller.
Be certain that your software is located at a correct address corresponding to the device you're loading it into. The chip
The external EPROM devices (U15 and U16) are 8 or 16-bit device bus devices and any software on them should be
When connecting a serial cable to the board, make sure you're using a "strait-through" serial cable (such as the one
If you get an exception error or if your program "hangs" or appears to jump out into unused memory, it is usually caused
On power-up, all memory addresses are mapped to addresses 0x00000000 - 0x00400000, and mirrored at each successive
a.
b. MAP_SW 1 and 4 must be OFF.
c.
d. The CFG_EN jumper must be installed
a.
b. MEM_EN must be OPEN.
c.
d. CFG_EN jumper must be installed
MODE_SW1 switch 5 must be ON, MODE SW3 position 5 OFF.
The MEM_EN jumper must be installed.
MODE_SW1 and 3 switch 5 must be OFF
MAP_SW position 4 on, 1 and 8 must be off.
for additional help or information. The MEM bank should contain the “Axiom MON5xx” EPROM’s
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CMD-5xx 08/07/02