5XX MOTHERBOARD ONLY AXIOM, 5XX MOTHERBOARD ONLY Datasheet - Page 13

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5XX MOTHERBOARD ONLY

Manufacturer Part Number
5XX MOTHERBOARD ONLY
Description
CMD-5XX MOTHERBOARD ONLY
Manufacturer
AXIOM
Datasheet

Specifications of 5XX MOTHERBOARD ONLY

Silicon Manufacturer
Freescale
Core Architecture
Power
Core Sub-architecture
PowerPC
Features
Plug And Play, Axiom Monitor, Communication Interfaces, Keypad And LCD Module Support
Kit Contents
Board
Silicon Core Number
MPC555, MPC556, MPC561
Silicon Family Name
MPC5xx
MEM_EN Jumper
The MEM_EN option jumper is located next to the MAP_SW. When installed it connects chip select CS0* to the MEM sockets
U15/U16. The MEM sockets normally contain the Axiom Monitor / Utility firmware EPROM’s that provide board operation from
Reset. If the MEM_EN option jumper is removed the MEM sockets memory bank U15/U16 will be disabled and idle.
This jumper should be removed if CS0* is assigned to another memory bank.
MEM_OPT Jumper
The MEM_OPT option jumper provides options for 28 or 32 pin memory device and 8 or 16 bit addressing options for 32 pin
devices installed in the 32 pin U15 and/or U16 MEM sockets memory bank. A 28 pin memory device must have MEM_OPT jumper
1 installed to supply necessary operating power or the device may load the data bus even if deselected with the MEM_EN option
jumper.
1 2 3
MEM_VOLT Jumper
The MEM_VOLT option jumper determines the MEM Sockets device operating voltage. This should be set to the voltage required
for the device(s) installed in U15A/B and U16. The device must be compatible with the bus voltage level of the installed MPC5xx
or damage to the MPC5xx can occur.
1 2 3
PRU_EN Jumper
The PRU_EN option jumper provides chip select assignment for the Port Replacement Unit, Keypad, and LCD interfaces. Chip
selects CS2 or CS3 (Default) can be assigned to the PRU. If the option jumper is idled (no 2 pins connected), the PRU is disabled
and not present in the memory map. Any previous operations with the PRU will remain valid until the next system reset.
3 2 1
3 2 1
Correct chip select configuration in software is critical for valid operation of the PRU. The PRU provides the TA* (Transfer
Acknowledge) signal to terminate bus transactions and provide proper timing for replacement ports, Keypad and LCD. Following
are the required chip select register values for correct PRU operation:
A single 28 pin device can be used in U15B to provide an 8 bit port also.
Standard EPROM devices are the 27xxxx series eproms. Both 5v and 3.3V versions can be used.
BRx = 01000007 hex, default base address shown but can be moved to any available memory map location.
ORx = FFFF80F0 hex
Position 1 = Memory is one or two 28 pin devices. *Default - 16 bit port
Position 2 = Memory is two 32 pin devices, 16 bit port, U15A/U16 in use.
Position 3 = Memory is one 32 pin device, 8 bit port, U15B in use.
Position 1-2 = MEM (U15/U16) devices are +5V operation *Default
Position 2-3 = MEM (U15/U16) devices are +3.3V operation
Position 3-2 = CS3 chip select assigned *Default Position
Position 2-1 = CS2 chip select assigned
13
CMD-5xx 08/07/02

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