5XX MOTHERBOARD ONLY AXIOM, 5XX MOTHERBOARD ONLY Datasheet - Page 9

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5XX MOTHERBOARD ONLY

Manufacturer Part Number
5XX MOTHERBOARD ONLY
Description
CMD-5XX MOTHERBOARD ONLY
Manufacturer
AXIOM
Datasheet

Specifications of 5XX MOTHERBOARD ONLY

Silicon Manufacturer
Freescale
Core Architecture
Power
Core Sub-architecture
PowerPC
Features
Plug And Play, Axiom Monitor, Communication Interfaces, Keypad And LCD Module Support
Kit Contents
Board
Silicon Core Number
MPC555, MPC556, MPC561
Silicon Family Name
MPC5xx
Memory Banks and Default Memory Map
The CMD-5xx board provides three memory banks and a Port Replacement Unit (PRU) that can be optionally selected by the
MPC5xx microcontroller chip selects. The memory banks are the Synchronous SRAM (U2-U5), Burstable Flash EPROM (U13-
U14), and MEM firmware sockets (U15-U16). Since the MPC5xx chip selects are fully programmable (with the exception of CS0
providing external Reset start-up) the memory banks can be located at any location in the MPC5xx memory space. As a reference
example, Axiom has defined a default memory map where the chip selects are located at predefined locations. The provided
software uses this memory configuration. If you modify this memory map make sure that all memory bank and chip select
configuration settings are correct. See Memory Device / Bank Selection and Configuration for more information.
Following is the default memory map for this board as configured by the utility EPROMs installed the MEM sockets U15/U16. The
internal map is detailed further in the MPC5xx Users Manual. Chip Selects 0-3 can be changed by your software to map the external
memory in different locations but the chip select configuration for each memory type should be maintained.
Possible Chip Select usage:
CMD-5xx Default Memory Map
0000 0000
0007 0000
002F C000
003F 9800
0040 0000
0080 0000
00C0 0000
0100 0000
0140 0000
FFFF FFFF
Synchronous SRAM Memory Bank
Burstable Flash Memory Bank
Port Replacement Unit
MEM Sockets Bank
Internal Memory (See MPC5xx microcontroller documentation)
External Memory
40:0000 – 47:FFFF for 512K device
40:0000 – 40:FFFF for 64K device
32 bit port , parallel devices U13-U14 with 4M bytes at C0:0000-FF:FFFF on this board
CS3
or 16 bit port, U13 device with 2M bytes at C0:0000–DF:FFFF
– External Port Replacement Unit (PRU), LCD Port and Keypad
CS1
CMFI Internal Flash Memory Array if present
CS0, CS1, CS2, or CS3
CS0, CS1 or CS2
CS2 or CS3
CS0
(see the PRU Memory section below for details)
2M bytes at 80:0000–9F:FFFF on this board
– External Sync. SRAM – 32 bit port, devices U2-U5
On-chip Control and Status Registers
CS2
Reserved or CMFI Array 2
Non Mapped Address Space
– External Flash Memory
Internal SRAM
16 bit MEM devices U15A-U16 or 8 bit MEM device in U15B
9
(shipped with monitor / utilities program here)
default CS1
default CS2
default CS3
CS0
- External MEM EPROM
CMD-5xx 08/07/02

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