IP-10GETHERNET Altera, IP-10GETHERNET Datasheet - Page 3

• Manufacturer Part Number: IP-10GETHERNET
• Description: IP CORE - 10 Gbps Ethernet MAC PCS PMA Reference Design
• Manufacturer: Altera

Specifications of IP-10GETHERNET

• Software Application: IP CORE, Interface And Protocols, ETHERNET
• Supported Families: Quartus II
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Figure 1–1. 10-Gbps Ethernet IP Core Block Diagram
Note to
(1) You can implement the optional XAUI PCS in an Altera device transceiver or as soft logic, which results in a soft 10GBASE-X XAUI PCS and PMA.
1.1. Supported Features
© July 2010 Altera Corporation
Figure
Avalon-ST Interface
Avalon-MM Interface
1–1:
(datapath)
(control)
1
This datasheet describes the Altera
IEEE 802.3 2005 and 802.1Q Ethernet standards. You can use the Quartus
to parameterize and implement this IP core in your design. The 10-Gbps Ethernet IP
core is highly configurable. It includes an Ethernet Media Access Controller (MAC)
with an Avalon
standard XGMII interface on the network side. The XAUI interface is implemented as
hard IP in an Altera FPGA transceiver or as soft logic, which results in a soft
10GBASE-X XAUI PCS. Alternatively, you can choose to implement a 10-Gbps
Ethernet IP core that includes only the MAC or the soft XAUI PCS.
illustrates the top-level modules of this IP core.
Altera categorizes this IP core as a reference design, described on the Altera website
on the
■
■
■
■
Flexible standard interfaces: SDR XGMII-like interface to connect to the internal
10GBASE-X (XAUI) PHY, standard XGMII interface to connect to the external
PHY device, hard IP XAUI PCS and PMA to connect to an external optical module.
Verified and tested in hardware with standard 10-Gbps Ethernet test equipment.
The IP core has passed the University of New Hampshire Interoperability Lab
(UNH-IOL) 10-Gbps Ethernet tests including MAC, 10GBASE-X physical coding
sublayer (PCS), Reconciliation Sublayer, flow control, and XAUI physical media
attachment (PMA).
Management data I/O (MDIO) master interface for external PHY device
management.
Avalon-ST 64-bit wide client interface running at 156.25 MHz with 10-Gbps
full-duplex throughput rate.
10-Gbps Ethernet Reference Design
Ethernet MAC
®
10-Gbps
Streaming (Avalon-ST) interface on the client side, and a XAUI or a
XGMII
(Note 1)
10-Gbps Ethernet IP Core
1. 10-Gbps Ethernet IP Datasheet
®
PCS
10-Gbps Ethernet IP core which implements the
Optional (Note 1)
web page.
PMA
XAUI
10-Gbps Ethernet IP Datasheet
PHY Device
Interface
Figure 1–1
®
II software