PN5120A0HN1/C2,151 NXP Semiconductors, PN5120A0HN1/C2,151 Datasheet - Page 12

• Manufacturer Part Number: PN5120A0HN1/C2,151
• Description: IC TRANSMISSION MOD 32-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN1/C2,151

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B
• Package / Case: 32-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
111334
Product data sheet
8.1.1 Register bit behavior
Depending on the functionality of a register, the access conditions to the register can vary.
In principle bits with same behavior are grouped in common registers. In
access conditions are described.
Table 6.
Abbreviation Behavior
r/w
dy
r
w
RFU
RFT
Behavior of register bits and its designation
read and write These bits can be written and read by the μ-Controller. Since they
dynamic
read only
write only
-
-
Rev. 3.4 — 8 September 2009
Description
are used only for control means, there content is not influenced by
internal state machines, e.g. the PageSelect-Register may be
written and read by the μ-Controller. It will also be read by internal
state machines, but never changed by them.
These bits can be written and read by the μ-Controller.
Nevertheless, they may also be written automatically by internal
state machines, e.g. the Command-Register changes its value
automatically after the execution of the actual command.
These registers hold bits, which value is determined by internal
states only, e.g. the CRCReady bit can not be written from
external but shows internal states.
Reading these registers returns always ZERO.
These registers are reserved for future use.
In case of a PN512 Version V1.0 (VersionReg=80h) a read
access to these registers returns always the value “0”.
Nevertheless this is not guaranteed for future chips versions
where the value is undefined. In case of a write access, it is
recommended to write always the value “0”.
These registers are reserved for production tests and shall not be
changed.
Transmission Module
© NXP B.V. 2010. All rights reserved.
Table 6
PN512
the
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