PCF8578H/1 NXP Semiconductors, PCF8578H/1 Datasheet - Page 23
![LCD Drivers LCD DRVR DOT MATRIX](/photos/15/63/156391/plf64_sml.jpg)
PCF8578H/1
Manufacturer Part Number
PCF8578H/1
Description
LCD Drivers LCD DRVR DOT MATRIX
Manufacturer
NXP Semiconductors
Datasheet
1.PCF8578H1157.pdf
(46 pages)
Specifications of PCF8578H/1
Maximum Clock Frequency
3.3 KHz
Operating Supply Voltage
2.5 V to 6 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 85 C
Package / Case
LQFP-64
Maximum Supply Current
50 uA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PCF8578H/1,157
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PCF8578H/1,118
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
PCF8578H/1,157
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
PCF8578_6
Product data sheet
Table 12.
[1]
Table 13.
[1]
Table 14.
[1]
[2]
Bit
7
6 to 2
1, 0
Bit
7
6 to 4
3 to 0
Bit
7
6 to 4
3, 2
1, 0
Useful for scrolling, pseudo-motion and background preparation of new display content.
Values shown in decimal.
See operation code for set-start-bank in
Values shown in decimal.
Symbol
C
-
B[1:0]
Symbol
C
-
A[3:0]
Symbol
C
-
G[1:0]
Y[1:0]
Set-start-bank - command bit description
Device-select - command bit description
RAM-access - command bit description
Rev. 06 — 5 May 2009
Value
0, 1
11111
00
01
10
11
Value
0, 1
110
0 to 15
Value
0, 1
111
00
01
10
11
0 to 3
LCD row/column driver for dot matrix graphic displays
[2]
[1]
Table
12.
Description
see
fixed value
start bank pointer (see
Description
see
fixed value
hardware subaddress;
Description
see
fixed value
RAM access mode;
character
half-graphic
full-graphic
not allowed
RAM row address;
bank 0
bank 1
bank 2
bank 3
4 bit binary value; transferred to the subaddress
counter to define one of sixteen hardware
subaddresses
defines the auto-increment behavior of the
address for RAM access (see
two bits of immediate data, transferred to the
Y-address pointer to define one of four display
RAM rows (see
Table 10
Table 10
Table 10
[1]
Figure
Figure
17)
20)
PCF8578
© NXP B.V. 2009. All rights reserved.
Figure
[1]
18)
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