PACCLK5406D-S-EVN Lattice, PACCLK5406D-S-EVN Datasheet - Page 26

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PACCLK5406D-S-EVN

Manufacturer Part Number
PACCLK5406D-S-EVN
Description
Development Software ispClock5312S Eval 56020A Dev Mix Sig
Manufacturer
Lattice
Datasheet

Specifications of PACCLK5406D-S-EVN

Tool Type
Development Software Support
Core Architecture
CPLD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lattice Semiconductor
Figure 27. Bank 0 MLVDS with On-Board Termination
LVPECL
LVPECL drivers require a DC bias at the driven end of the T-Line and 100 ohms differential termination at the
receiving end of the T-Line. The DC bias is usually provided by 50 ohms impedance to VCCO-2V. This will both
bias the output buffers and terminate one end of the T-Line to minimize reflections. In Figure 28, R19 with R21 and
R20 with R22 function as voltage dividers to provide the required bias and termination. With a 3.3V VCCO supply
the divided voltage is 1.3V and the Thevenin-equivalent impedance seen by the T-Line is 50 ohms (82 || 124 = 50).
At the receiving end of the on-board T-Line, the termination and scope sense circuit is identical to that of LVDS cir-
cuit discussed above.
Figure 28. Bank 0 LVPECL with On-Board Termination
SSTL15/SSTL18
SSTL15 and SSTL18 both utilize the same termination network, which is 50 ohms at the receiving end of the T-Line
to VCCO divided by 2. Figure 29 shows that for the ispClock5406 a source termination of 20 ohms is also recom-
mended and provided by R16 and R17. At the load end of the non-inverting T-Line the output supply VCCO is
divided in half using the network of R33 on the top side and R23, R25, R28, and the scope input impedance on the
bottom side. The lower half of this divider is a 5:1 sub-divider for viewing the waveform at the scope. The inverting
output has a similar circuit to provide a balanced load at the end of the T-Line and to support viewing both sides of
the differential signal.
LVPECL
ispClock
MLVDS
ispClock
Buffers
Buffers
R16
R17
R16
R17
0
0
0
0
R18
R21
124
R19
R22
124
R20
100
82
82
ispClock5406D Standard Evaluation Board
ispClock5406D Standard Evaluation Board
VCCO
VCCO
50 ohms / 64.3 mm
5
50 ohms / 64.3 mm
5
0
On Board T-Line
On Board T-Line
0
On Board T-Line
On Board T-Line
o
o
h
h
m
m
s
s
/
/
6
6
4
4
3 .
3 .
m
m
m
m
R23
R24
R23
R24
33
33
33
33
26
R25
R26
R25
R26
22
22
22
22
0.1uF
0.1uF
0.1uF
0.1uF
R28
R29
R28
R29
BANK_0N
BANK_0P
BANK_0N
BANK_0P
R30
R31
R30
R31
34
34
34
34
J4
J3
J4
J3
ispClock5400D Evaluation Board
SMA to BNC Cable
SMA to BNC Cable
SMA to BNC Cable
SMA to BNC Cable
50 ohms / 91 cm
5
50 ohms / 91 cm
5
0
0
o
o
h
h
m
m
s
s
/
/
9
9
1
1
c
c
m
m
Scope
User’s Guide
5pF
5pF
Scope
5pF
5pF
50
50
50
50

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