LC5512M-PAC-EV Lattice, LC5512M-PAC-EV Datasheet - Page 9

• Manufacturer Part Number: LC5512M-PAC-EV
• Description: MCU, MPU & DSP Development Tools Eval Board for XPLD5512 PAC1208
• Manufacturer: Lattice

Specifications of LC5512M-PAC-EV

• Processor To Be Evaluated: ispXPLD 5512MX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 3. MFB in SuperWIDE Logic Mode†
Figure 4. Macrocell Slice in Logic Mode AND-Array
68
From
GRP
AND Array
Dual-OR Array
68 Inputs
68 Inputs
Adjacent
Routing
from
from
MFB
From
n-7
Carry-in
n+7
To
Carry-out
Shared PT Reset
PTSA Bypass
Shared PTCLK
PT Clock
PT Preset
PT Reset
Global Reset
PTSA
Carry Out
CLK0
CLK1
CLK2
CLK3
Shared PT Clk En
Shared PT Clk
5
Shared PT Reset
Shared
PT CE
To Routing
ispXPLD 5000MX Family Data Sheet
Macrocell
D
Clk En
Clk
P
Sharing
PTOE
R/L
R
Q
PT OE to
I/O Block
From
I/O Cell
Output
to I/O Block or
Internal Control
(See Pin Table
for Assignments)
GRP