LS-E250E-BASE-PC-N Lattice, LS-E250E-BASE-PC-N Datasheet - Page 11

• Manufacturer Part Number: LS-E250E-BASE-PC-N
• Description: MCU, MPU & DSP Development Tools ispLEVER Base LMico 32/DSP Dev Kit ECP2
• Manufacturer: Lattice

Specifications of LS-E250E-BASE-PC-N

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Table 11. SATA Jacks X15 (Left Column) and X16 (Right Column) Pin Definition
Serial Interface
The board includes an RS232 serial interface port. The interface provides transmit (TX), receive (RX), and hard-
ware handshaking. The Maxim MAX3232 data sheet provides detailed information on the interface circuit. A 9-pin
female to 9-pin female null modem cable is required.
Table 12. Serial Interface X9 Pin Definition
Sigma Delta D/A Converter
The board includes a low-pass filter connected to a dedicated pin (C14) of the FPGA. With this, a sigma delta con-
verter can be realized. Great results can be achieved by using a resolution of 8 to 10 bits. Example VHDL code is
provided.
Power Supply
Four different voltages are needed: 3.3V I/O voltage, 2.5V DDR and LVDS voltages as well as 1.2V core voltage.
The 3.3V supply draws up to 1A, the 2.5V and 1.2V supplies up to 2A of current.
For more information, see the power supply information in the Components section of this document.
Test Points
In order to check the various voltage levels used, several test points are provided. There is one test point for 1.2V,
2.5V, 3.3V, one for ground, and one for accessing the 25MHz oscillator. The 25MHz clock signal can be checked
with another test point.
USB Host/Peripheral Interface
There are one mini USB OTG and two USB host connectors on board. These are connected to the Cypress
CY7C67300 USB Host/Peripheral Controller U0702. This controller is compliant with the Universal Serial Bus
Specification 2.0. You can transmit and receive serial data at both full-speed (12 Mbps) and low-speed (1.5 Mbps)
data rates. For more information, please refer to the data sheet of the USB controller. U0703 and U0704 are USB
power control switches, which must be enabled by the user via the USB PWEN signals. The USB OC signal pulls
low to indicate voltage, current and thermal issues.
Table 13. USB GPIO Connections (U0702)
Pin
2
3
5
6
Sub-D Pin
Pin
94
92
90
87
3
7
2
8
Signal Name
SATA_X1D0+
SATA_X1D1+
Signal Name
SATA_X1D0-
SATA_X1D1-
USB_GPIO0
USB_GPIO2
USB_GPIO4
USB_GPIO6
RS_TXD_LVTTL
RS_RTS_LVTTL
RS_RXD_LVTTL
RS_CTS_LVTTL
Signal
FPGA Pin
FPGA Pin
AE20
AE13
AA20
AE19
M4
M5
P3
R3
FPGA Pin
11
K26
K25
J25
J26
Pin
93
91
89
86
LatticeMico32/DSP Development Board
Pin
2
3
5
6
Signal Name
USB_GPIO1
USB_GPIO3
USB_GPIO5
USB_GPIO7
Direction
Out
Out
In
In
Signal Name
SATA_X2D0+
SATA_X2D1+
SATA_X2D0-
SATA_X2D1-
for LatticeECP2 User’s Guide
RS232 Function
Request to Send
FPGA Pin
Transmit Data
Clear to Send
Receive Data
AD19
AC18
AB20
AF19
FPGA Pin
W2
U3
U4
V2