LS-E250E-BASE-PC-N Lattice, LS-E250E-BASE-PC-N Datasheet - Page 21

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LS-E250E-BASE-PC-N

Manufacturer Part Number
LS-E250E-BASE-PC-N
Description
MCU, MPU & DSP Development Tools ispLEVER Base LMico 32/DSP Dev Kit ECP2
Manufacturer
Lattice
Datasheet

Specifications of LS-E250E-BASE-PC-N

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lattice Semiconductor
Table 24. Data Signals of the Asynchronous SRAM Chip U0404
Table 25. Data Signals of the Asynchronous SRAM Chip U0405
Table 26. Control Signals of the Asynchronous SRAM Chips U0404 and U0405
MachXO
The LCMXO640 is a non-volatile, instant-on, reprogrammable logic device. It supports “background programming”
called TransFR™ (i.e., the device can be programmed while in operation).
The MachXO comes preprogrammed from the factory. The factory program permits the CY7C68013A/MachXO
combination to work as a built-in USB ispDOWNLOAD cable. Using ispVM software the built-in download cable
permits the FPGA, and SPI PROM, to be programmed. It is not recommended for the MachXO to be repro-
grammed. However, the MachXO does provide some connections to the LatticeECP2-50 FPGA, and to an 8x6 pro-
totyping area.
For further information, please consult the
SRAM Pin
SRAM Pin
SRAM Pin
SRAM
13
15
29
31
35
37
13
15
29
31
35
37
17
39
7
9
7
9
6
MEMORY_DQ10
MEMORY_DQ12
MEMORY_DQ14
MEMORY_DQ16
MEMORY_DQ18
MEMORY_DQ20
MEMORY_DQ22
MEMORY_DQ24
MEMORY_DQ26
MEMORY_DQ28
MEMORY_DQ30
MEMORY_WE#
MEMORY_DQ0
MEMORY_DQ2
MEMORY_DQ4
MEMORY_DQ6
MEMORY_DQ8
Signal Name
Signal Name
Signal Name
SRAM_BE0#
SRAM_CE#
Pin
MachXO Family Data
FPGA Pin
FPGA Pin
FPGA Pin
Signal
D10
G11
D12
C13
B10
F10
A11
E11
F12
F13
E13
G7
E7
B8
D8
A9
C9
E9
F8
21
SRAM Pin
SRAM Pin
SRAM Pin
Name
LatticeMico32/DSP Development Board
10
14
16
30
32
36
38
10
14
16
30
32
36
38
41
40
8
8
Sheet.
MEMORY_DQ11
MEMORY_DQ13
MEMORY_DQ15
MEMORY_DQ17
MEMORY_DQ19
MEMORY_DQ21
MEMORY_DQ23
MEMORY_DQ25
MEMORY_DQ27
MEMORY_DQ29
MEMORY_DQ31
for LatticeECP2 User’s Guide
MEMORY_DQ1
MEMORY_DQ3
MEMORY_DQ5
MEMORY_DQ7
MEMORY_DQ9
MEMORY_OE#
Signal Name
Signal Name
Signal Name
SRAM_BE1#
FPGA
FPGA Pin
FPGA Pin
FPGA Pin
A10
C10
E10
G10
B11
C12
E12
G12
D13
G13
F11
Pin
C8
G8
D9
F7
A8
E8
B9

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