PUMB30 T/R NXP Semiconductors, PUMB30 T/R Datasheet - Page 5

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PUMB30 T/R

Manufacturer Part Number
PUMB30 T/R
Description
Digital Transistors TRNS DOUBL RET TAPE7
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PUMB30 T/R

Configuration
Dual
Transistor Polarity
PNP
Typical Input Resistor
2.2 KOhms
Mounting Style
SMD/SMT
Package / Case
UMT-6
Collector- Emitter Voltage Vceo Max
50 V
Peak Dc Collector Current
100 mA
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 65 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PUMB30,115
NXP Semiconductors
8. Package outline
9. Packing information
PEMB30_PUMB30_2
Product data sheet
Fig 3.
2.2
2.0
Dimensions in mm
1.35
1.15
Package outline SOT363 (SC-88)
pin 1
index
6
1
0.65
2.2
1.8
1.3
Table 9.
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
[2]
[3]
Type number Package Description
PEMB30
PUMB30
2
5
For further information and the availability of packing methods, see
T1: normal taping
T2: reverse taping
4
3
0.3
0.2
Packing methods
0.45
0.15
PNP/PNP double resistor-equipped transistors; R1 = 2.2 k , R2 = open
SOT666
SOT363
Rev. 02 — 2 September 2009
0.25
0.10
1.1
0.8
06-03-16
2 mm pitch, 8 mm tape and reel
4 mm pitch, 8 mm tape and reel
4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
Fig 4.
1.7
1.5
Dimensions in mm
1.3
1.1
Package outline SOT666
pin 1 index
PEMB30; PUMB30
6
1
0.5
1.7
1.5
1
Section
5
2
[2]
[3]
Packing quantity
3000 4000 8000 10000
-
-
-115
-125
[1]
13.
3
4
0.27
0.17
-
-115
-
-
© NXP B.V. 2009. All rights reserved.
0.3
0.1
-315
-
-
-
0.6
0.5
0.18
0.08
04-11-08
-
-
-135
-165
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