AD5722RBREZ Analog Devices Inc, AD5722RBREZ Datasheet - Page 26

• Manufacturer Part Number: AD5722RBREZ
• Description: Dual 12Bit DAC 0.5 LSB INL + 10ppm Ref
• Manufacturer: Analog Devices Inc

Specifications of AD5722RBREZ

• Design Resources: Software Configurable 12-Bit Dual-Channel Unipolar/Bipolar Voltage Output Using AD5722R (CN0091)
• Settling Time: 10µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital, Dual ±
• Power Dissipation (max): 190mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5722R/AD5732R/AD5752R
INPUT SHIFT REGISTER
The input shift register is 24 bits wide and consists of a read/write bit (R/ W ); a reserved bit (ZERO), which must always be set to 0; three
register select bits (REG2, REG1, REG0); three DAC address bits (A2, A1, A0); and 16 data bits (data). The register data is clocked in MSB
first on the SDIN pin. Table 17 shows the register format, while Table 18 describes the function of each bit in the register. All registers are
read/write registers.
Table 17. AD5752R Input Register Format
MSB
DB23
R/W
Table 18. Input Register Bit Functions
Bit Mnemonic
R/W
REG2, REG1, REG0
A2, A1, A0
Data
DB22
Zero
Description
Indicates a read from or a write to the addressed register.
Used in association with the address bits to determine if a write operation is to the DAC register, output range
select register, power control register, or control register.
REG2
0
0
0
0
These DAC address bits are used to decode the DAC channels.
A2
0
0
1
Data bits.
DB21
REG2
REG1
0
0
1
1
A1
0
1
0
DB20
REG1
REG0
0
1
0
1
A0
0
0
0
Function
DAC register
Output range select register
Power control register
Control register
Channel Address
DAC A
DAC B
Both DACs
Rev. C | Page 26 of 32
DB19
REG0
DB18
A2
DB17
A1
DB16
A0
DB15 to DB0
Data
LSB