AD5722RBREZ Analog Devices Inc, AD5722RBREZ Datasheet - Page 27

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AD5722RBREZ

Manufacturer Part Number
AD5722RBREZ
Description
Dual 12Bit DAC 0.5 LSB INL + 10ppm Ref
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5722RBREZ

Design Resources
Software Configurable 12-Bit Dual-Channel Unipolar/Bipolar Voltage Output Using AD5722R (CN0091)
Settling Time
10µs
Number Of Bits
12
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Analog and Digital, Dual ±
Power Dissipation (max)
190mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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DAC REGISTER
The DAC register is addressed by setting the three REG bits to 000. The DAC address bits select the DAC channel where the data transfer
is to take place (see Table 18). The data bits are in positions DB15 to DB0 for the AD5752R (see Table 19), DB15 to DB2 for the AD5732R
(see Table 20), and DB15 to DB4 for the AD5722R (see Table 21).
Table 19. Programming the AD5752R DAC Register
MSB
R/W
0
Table 20. Programming the AD5732R DAC Register
MSB
R/W
0
Table 21. Programming the AD5722R DAC Register
MSB
R/W
0
OUTPUT RANGE SELECT REGISTER
The output range select register is addressed by setting the three REG bits to 001. The DAC address bits select the DAC channel, and the
range bits (R2, R1, R0) select the required output range (see Table 22 and Table 23).
Table 22. Programming the Required Output Range
MSB
0
Table 23. Output Range Options
R2
0
0
0
0
1
1
R/W
Zero
0
Zero
0
Zero
0
Zero
0
R1
0
0
1
1
0
0
REG2
0
REG2
0
REG2
0
REG2
0
REG1
0
REG1
0
REG1
0
R0
0
1
0
1
0
1
REG0
1
REG0
0
REG1
0
REG0
0
A2
A2
Rev. C | Page 27 of 32
DAC address
Output Range (V)
+5
+10
+10.8
±5
±10
±10.8
REG0
0
DAC address
A2
A1
A1
A0
DAC address
A1
A0
A2
DB15 to DB3
Don’t care
DB15 to DB4
12-bit DAC data
A0
DAC address
AD5722R/AD5732R/AD5752R
A1
DB15 to DB2
14-bit DAC data
DB2
R2
A0
DB3
X
DB1
R1
DB2
X
16-bit DAC data
DB1
X
DB15 to DB0
DB1
X
DB0
R0
DB0
X
DB0
X
LSB
LSB
LSB
LSB

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