ADUC7036BCPZ-RL Analog Devices Inc, ADUC7036BCPZ-RL Datasheet - Page 77
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ADUC7036BCPZ-RL
Manufacturer Part Number
ADUC7036BCPZ-RL
Description
Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.EVAL-ADUC7036QSPZ.pdf
(132 pages)
Specifications of ADUC7036BCPZ-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7036BCPZ-RL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Timer1 Capture Register
Name: T1CAP
Address: 0xFFFF0330
Default Value: 0x00000000
Access: Read only
Function: This 32-bit register holds the 32-bit value captured by
an enabled IRQ event.
Table 54. T1CON MMR Bit Designations
Bit
31 to 24
23
22 to 20
19
18
17
16 to 12
11 to 9
8
7
6
5 to 4
3 to 0
Description
8-bit postscaler.
By writing to these eight bits, a value is written to the postscaler. Writing 0 is interpreted as a 1.
By reading these eight bits, the current value of the counter is read.
Timer1 enable postscaler.
Set to enable the Timer1 postscaler. If enabled, interrupts are generated after T1CON[31:24] periods as defined by T1LD.
Cleared to disable the Timer1 postscaler.
Reserved. These bits are reserved and should be written as 0 by user code.
Postscaler compare flag. Read only.
Set if the number of Timer1 overflows is equal to the number written to the postscaler.
Timer1 interrupt source.
Set to select interrupt generation from the postscaler counter.
Cleared to select interrupt generation directly from Timer1.
Event select bit.
Set by user to enable time capture of an event.
Cleared by user to disable time capture of an event.
Event select range (0 to 17). The events are described in Table 52.
Clock select.
000 = core clock (default).
001 = low power 32.768 kHz oscillator.
010 = GPIO_8.
011 = GPIO_5.
Count up.
Set by user for Timer1 to count up.
Cleared by user for Timer1 to count down (default).
Timer1 enable bit.
Set by user to enable Timer1.
Cleared by user to disable Timer1 (default).
Timer1 mode.
Set by user to operate in periodic mode.
Cleared by user to operate in free running mode (default).
Format.
00 = binary (default).
01 = reserved.
10 = hours:minutes:seconds:hundredths (23 hours to 0 hours).
11 = hours:minutes:seconds:hundredths (255 hours to 0 hours).
Prescaler.
0000 = source clock/1 (default).
0100 = source clock/16.
1000 = source clock/256.
1111 = source clock/32,768.
Rev. C | Page 77 of 132
Timer1 Control Register
Name: T1CON
Address: 0xFFFF0328
Default Value: 0x01000000
Access: Read/write
Function: This 32-bit MMR configures the Timer1 mode of
operation.
ADuC7036