CS2000CP-CZZ Cirrus Logic Inc, CS2000CP-CZZ Datasheet - Page 5

• Manufacturer Part Number: CS2000CP-CZZ
• Description: IC General Purpose PLL Crystal
• Manufacturer: Cirrus Logic Inc
• Type: Fractional N Synthesizerr

Specifications of CS2000CP-CZZ

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: No/No
• Frequency - Max: 75MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Frequency-max: 75MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1572 - KIT EVAL PROTOTYPING CS2300-CP598-1571 - KIT EVAL PROTOTYPING CS2000-CP598-1493 - BOARD EVAL GEN PURPOSE PLL DC598-1492 - BOARD EVAL GEN PURPOSE PLL DC598-1490 - BOARD EVAL GEN PURPOSE PLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1748; CS2000CP-CZZ

DS761PP1
1. PIN DESCRIPTION
Pin Name
VD
GND
CLK_OUT
AUX_OUT
CLK_IN
XTO
XTI/REF_CLK
AD0/CS
SCL/CCLK
SDA/CDIN
AUX_OUT
CLK_OUT
10 Serial Control Data (Input/Output) - SDA is the data I/O line in I²C Mode. CDIN is the input data
#
1
2
3
4
5
6
7
8
9
CLK_IN
Pin Description
Digital Power (Input) - Positive power supply for the digital and analog sections.
Ground (Input) - Ground reference.
PLL Clock Output (Output) - PLL clock output.
Auxiliary Output (Output) - This pin outputs a buffered version of one of the input or output clocks,
or a status signal, depending on register configuration.
Frequency Reference Clock Input (Input) - Clock input for the Digital PLL frequency reference.
Crystal Connections (XTI/XTO) / Timing Reference Clock Input (REF_CLK) (Input/Output) -
XTI/XTO are I/O pins for an external crystal which may be used to generate the low-jitter PLL input
clock. REF_CLK is an input for an externally generated low-jitter reference clock.
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C
Mode. CS is the chip select signal in SPI Mode.
Control Port Clock (Input) - SCL/CCLK is the serial clock for the serial control port in I²C and SPI
mode.
line for the control port interface in SPI Mode.
GND
VD
1
2
3
4
5
10
9
8
7
6
SDA/CDIN
SCL/CCLK
AD0/CS
XTI/REF_CLK
XTO
CS2000-CP
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