CS8422-DNZR Cirrus Logic Inc, CS8422-DNZR Datasheet - Page 49
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CS8422-DNZR
Manufacturer Part Number
CS8422-DNZR
Description
IC 24-bit 192kHz SRC S/PDIF Receiver
Manufacturer
Cirrus Logic Inc
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DS692PP1
CHS – Sets which channel's C data is decoded in the Receiver Channel Status register (11h) (Default = ‘0’)
DETCI - D to E status transfer inhibit
DEM_CNTL[2:0] – De-emphasis filter control. See
01 - replace the current audio sample with all zeros (mute).
10 - do not change the received audio sample.
11 - reserved
0 - A channel
1 - B channel
If CHS = 0 and TRUNC = 1, both channels' audio data will be truncated by the AUX[3:0] bits indicated in
the channel A Channel Status data. If CHS = 1 and TRUNC = 1, both channels' audio data will be trun-
cated by the AUX[3:0] bits indicated in the channel B Channel Status data. This will occur even if the
AUX[3:0] bits indicated in the channel A Channel Status data are not equal to the AUX[3:0] bits indicated
in the channel B Channel Status data.
0 -Allow update
1 -Inhibit update
000 - De-emphasis filter off.
001 - 32 kHz setting
010 - 44.1 kHz setting
011 - 48 kHz setting
100 - Auto-detect Sample Rate. If the PLL estimates that the incoming sample rate is below 49 kHz, de-
emphasis will be applied according to the Channel Status data of the incoming AES3 or S/PDIF data. If
the PLL estimates that the incoming sample rate is not below 49 kHz, de-emphasis will not be enabled. If
the incoming Channel Status data indicates that no de-emphasis should be applied, de-emphasis will not
be enabled. If data is detected as being non-audio, the de-emphasis filter will not be enabled.
Figure 25. De-Emphasis Filter Response
-10dB
Gain
0dB
dB
3.183 kHz
T1=50 µs
F1
Figure 25
10.61 kHz
F2
T2 = 15 µs
Frequency
for De-emphasis filter response.
CS8422
49
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