CYWUSB6935-48LTXC Cypress Semiconductor Corp, CYWUSB6935-48LTXC Datasheet - Page 15
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CYWUSB6935-48LTXC
Manufacturer Part Number
CYWUSB6935-48LTXC
Description
CYWUSB6935-48LTXC
Manufacturer
Cypress Semiconductor Corp
Specifications of CYWUSB6935-48LTXC
Frequency
2.4GHz
Data Rate - Maximum
62.5kbps
Modulation Or Protocol
DSSS, GFSK
Applications
AMR, ISM, RKE
Power - Output
0dBm
Sensitivity
-95dBm
Voltage - Supply
2.7 V ~ 3.6 V
Current - Receiving
57.7mA
Current - Transmitting
69.1mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Length (mm)
7mm
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CYWUSB6935-48LTXC
Manufacturer:
ST
Quantity:
1 200
Table 15. Transmit SERDES Interrupt Enable
Document Number : 38-16008 Rev. *G
7:4 Reserved
Bit
Addr: 0x0D
3
2
1
0
Underflow The Underflow bit is used to enable the interrupt associated with an underflow condition associated with the
Overflow
Done
Empty
7
Name
These bits are reserved and should be written with zeroes.
Transmit SERDES Data register (Reg 0x0F)
1 = Underflow interrupt enabled
0 = Underflow interrupt disabled
An underflow condition occurs when attempting to transmit while the Transmit SERDES Data register (Reg 0x0F)
does not have any data.
The Overflow bit is used to enabled the interrupt associated with an overflow condition with the Transmit SERDES
Data register (0x0F).
1 = Overflow interrupt enabled
0 = Overflow interrupt disabled
An overflow condition occurs when attempting to write new data to the Transmit SERDES Data register (Reg 0x0F)
before the preceding data has been transferred to the transmit shift register.
The Done bit is used to enable the interrupt that signals the end of the transmission of data.
1 = Done interrupt enabled
0 = Done interrupt disabled
The Done condition occurs when the Transmit SERDES Data register (Reg 0x0F) has transmitted all of its data
and there is no more data for it to transmit.
The Empty bit is used to enable the interrupt that signals when the Transmit SERDES register (Reg 0x0F) is empty.
1 = Empty interrupt enabled
0 = Empty interrupt disabled
The Empty condition occurs when the Transmit SERDES Data register (Reg 0x0F) is loaded into the transmit buffer
and it's safe to load the next byte
6
Reserved
5
REG_TX_INT_EN
4
Description
Underflow
3
Overflow
2
Done
1
CYWUSB6935
Default: 0x00
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