CYWUSB6935-48LTXC Cypress Semiconductor Corp, CYWUSB6935-48LTXC Datasheet - Page 17
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CYWUSB6935-48LTXC
Manufacturer Part Number
CYWUSB6935-48LTXC
Description
CYWUSB6935-48LTXC
Manufacturer
Cypress Semiconductor Corp
Specifications of CYWUSB6935-48LTXC
Frequency
2.4GHz
Data Rate - Maximum
62.5kbps
Modulation Or Protocol
DSSS, GFSK
Applications
AMR, ISM, RKE
Power - Output
0dBm
Sensitivity
-95dBm
Voltage - Supply
2.7 V ~ 3.6 V
Current - Receiving
57.7mA
Current - Transmitting
69.1mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Length (mm)
7mm
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CYWUSB6935-48LTXC
Manufacturer:
ST
Quantity:
1 200
Table 17. Transmit SERDES Data
Table 18. Transmit SERDES Valid
Table 19. PN Code
Note
Document Number : 38-16008 Rev. *G
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
5. The Valid bit in the Transmit SERDES Valid register (Reg 0x10) is used to mark whether the radio will send data or preamble during that bit time of the data byte. Data
Bit Name
7:0 Data
63:0 PN Codes
Bit
7:0 Valid
Bit
is sent LSB first. The SERDES will continue to send data until there are no more VALID bits in the shifter. For example, writing 0x0F to the Transmit SERDES Valid
register (Reg 0x10) will send half a byte.
Name
7
7
Address 0x14
Address 0x18
Name
Addr: 0x0F
Addr: 0x10
Addr: 0x18-11
[5]
Transmit Data. The over-the-air transmitted order is bit 0 followed by bit 1, followed by bit 2, followed by bit 3, followed
by bit 4, followed by bit 5, followed by bit 6, followed by bit 7.
The Valid bits are used to determine which of the bits in the Transmit SERDES Data register (reg 0x0F) are valid.
1 = Valid transmit bit
0 = Invalid transmit bit
The value inside the 8 byte PN code register is used as the spreading code for DSSS communication. All 8 bytes
can be used together for 64 chips/bit PN code communication, or the registers can be split into two sets of 32
chips/bit PN codes and these can be used alone or with each other to accomplish faster data rates. Not any 64
chips/bit value can be used as a PN code as there are certain characteristics that are needed to minimize the
possibility of multiple PN codes interfering with each other or the possibility of invalid correlation. The over-the-air
order is bit 0 followed by bit 1... followed by bit 62, followed by bit 63.
6
6
5
5
Address 0x17
Address 0x13
4
4
REG_TX_VALID
REG_TX_DATA
REG_PN_CODE
Valid
Data
Description
Description
Description
3
3
Address 0x12
Address 0x16
2
2
8
7
0x1E8B6A3DE0E9B222
6
1
1
CYWUSB6935
Default: 0x00
Default: 0x00
Address 0x15
5
Address 0x11
Default:
4
3
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