DSPIC33FJ128GP204T-I/ML Microchip Technology, DSPIC33FJ128GP204T-I/ML Datasheet - Page 102
![16-bit DSC, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ128GP204T-I/ML
Manufacturer Part Number
DSPIC33FJ128GP204T-I/ML
Description
16-bit DSC, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ128GP204T-I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ128GP204T-I/MLTR
- Current page: 102 of 412
- Download datasheet (6Mb)
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
REGISTER 7-9:
DS70292E-page 102
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
DAC1LIF
R/W-0
U-0
—
2:
(2)
Interrupts are disabled on devices without ECAN™ modules.
Interrupts are disabled on devices without Audio DAC modules.
DAC1LIF: DAC Left Channel Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
DAC1RIF: DAC Right Channel Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
Unimplemented: Read as ‘0’
C1TXIF: ECAN1 Transmit Data Request Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
DMA7IF: DMA Channel 7 Data Transfer Complete Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
DMA6IF: DMA Channel 6 Data Transfer Complete Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
CRCIF: CRC Generator Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
U2EIF: UART2 Error Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
U1EIF: UART1 Error Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
Unimplemented: Read as ‘0’
DAC1RIF
C1TXIF
R/W-0
R/W-0
IFS4: INTERRUPT FLAG STATUS REGISTER 4
(1)
(2)
W = Writable bit
‘1’ = Bit is set
DMA7IF
R/W-0
U-0
—
DMA6IF
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CRCIF
R/W-0
U-0
—
(2)
(2)
R/W-0
U2EIF
U-0
—
(1)
© 2011 Microchip Technology Inc.
x = Bit is unknown
R/W-0
U1EIF
U-0
—
U-0
U-0
—
—
bit 8
bit 0
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