DSPIC33FJ128GP204T-I/ML Microchip Technology, DSPIC33FJ128GP204T-I/ML Datasheet - Page 407
![16-bit DSC, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ128GP204T-I/ML
Manufacturer Part Number
DSPIC33FJ128GP204T-I/ML
Description
16-bit DSC, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ128GP204T-I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ128GP204T-I/MLTR
- Current page: 407 of 412
- Download datasheet (6Mb)
© 2011 Microchip Technology Inc.
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
CAN I/O Requirements ............................................. 353
I2Cx Bus Data Requirements (Master Mode) ........... 346
I2Cx Bus Data Requirements (Slave Mode) ............. 348
Output Compare Requirements ................................ 338
PLL Clock.......................................................... 332, 368
QEI External Clock Requirements ............................ 337
QEI Index Pulse Requirements................................. 340
Reset, Watchdog Timer, Oscillator Start-up Timer,
Simple OC/PWM Mode Requirements ..................... 339
SPIx Master Mode (CKE = 0) Requirements ............ 340
SPIx Master Mode (CKE = 1) Requirements ............ 341
SPIx Slave Mode (CKE = 0) Requirements .............. 342
SPIx Slave Mode (CKE = 1) Requirements .............. 344
Timer1 External Clock Requirements ....................... 336
Timer2 External Clock Requirements ....................... 337
Timer3 External Clock Requirements ....................... 337
Power-up Timer and Brown-out
Reset Requirements ......................................... 335
U
UART Module
Universal Asynchronous Receiver Transmitter (UART) ... 215
Using the RCON Status Bits............................................... 86
V
Voltage Regulator (On-Chip) ............................................ 303
W
Watchdog Time-out Reset (WDTR).................................... 85
Watchdog Timer (WDT)............................................ 299, 304
WWW Address ................................................................. 397
WWW, On-Line Support ..................................................... 14
UART1 Register Map ........................................... 49, 50
Programming Considerations ................................... 304
DS70292E-page 407
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