DSPIC33FJ128GP204T-I/ML Microchip Technology, DSPIC33FJ128GP204T-I/ML Datasheet - Page 252
![16-bit DSC, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ128GP204T-I/ML
Manufacturer Part Number
DSPIC33FJ128GP204T-I/ML
Description
16-bit DSC, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ128GP204T-I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ128GP204T-I/MLTR
- Current page: 252 of 412
- Download datasheet (6Mb)
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
REGISTER 20-5:
REGISTER 20-6:
DS70292E-page 252
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
RSE15
TSE15
R/W-0
R/W-0
R/W-0
R/W-0
RSE7
TSE7
RSE<15:0>: Receive Slot Enable bits
1 = CSDI data is received during the individual time slot n
0 = CSDI data is ignored during the individual time slot n
TSE<15:0>: Transmit Slot Enable Control bits
1 = Transmit buffer contents are sent during the individual time slot n
0 = CSDO pin is tri-stated or driven to logic ‘0’, during the individual time slot, depending on the state
RSE14
TSE14
R/W-0
R/W-0
R/W-0
R/W-0
RSE6
TSE6
of the CSDOM bit
RSCON: DCI RECEIVE SLOT CONTROL REGISTER
TSCON: DCI TRANSMIT SLOT CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
RSE13
TSE13
R/W-0
R/W-0
R/W-0
R/W-0
RSE5
TSE5
RSE12
TSE12
R/W-0
R/W-0
R/W-0
R/W-0
RSE4
TSE4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RSE11
TSE11
R/W-0
R/W-0
R/W-0
R/W-0
RSE3
TSE3
RSE10
TSE10
R/W-0
R/W-0
R/W-0
R/W-0
RSE2
TSE2
© 2011 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
RSE9
RSE1
TSE9
TSE1
R/W-0
R/W-0
R/W-0
R/W-0
RSE0
RSE8
TSE8
TSE0
bit 8
bit 0
bit 8
bit 0
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