DSPIC33FJ128GP204T-I/ML Microchip Technology, DSPIC33FJ128GP204T-I/ML Datasheet - Page 45
![16-bit DSC, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ128GP204T-I/ML
Manufacturer Part Number
DSPIC33FJ128GP204T-I/ML
Description
16-bit DSC, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ128GP204T-I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ128GP204T-I/MLTR
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TABLE 4-1:
XMODSRT
XMODEND
YMODSRT
YMODEND
XBREV
DISICNT
Legend:
SFR Name
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
004C
Addr
0048
004A
004E
0050
SFR
0052
CPU CORE REGISTERS MAP (CONTINUED)
BREN
Bit 15
—
Bit 14
—
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
XS<15:1>
XE<15:1>
YS<15:1>
YE<15:1>
Bit 8
Disable Interrupts Counter Register
XB<14:0>
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
0
1
Resets
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
All
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