DSPIC33FJ16GS502-E/SP Microchip Technology, DSPIC33FJ16GS502-E/SP Datasheet - Page 207

• Manufacturer Part Number: DSPIC33FJ16GS502-E/SP
• Description: 16 Bit MCU/DSP 40MIPS 16 KB FLASH SMPS 28 SPDIP .300in TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS502-E/SP

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 15-7:
REGISTER 15-8:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1: In Independent PWM mode, the PDCx register controls the PWMxH duty cycle only. In Complementary,
Note 1: The SDCx register is used in Independent PWM mode only. When used in Independent PWM mode, the
R/W-0
R/W-0
R/W-0
R/W-0
2: As the duty cycle gets closer to 0% or 100% of the PWM period (0 ns-40 ns, depending on the mode of
2: As the duty cycle gets closer to 0% or 100% of the PWM period (0 ns-40 ns, depending on the mode of
Redundant and Push-Pull PWM modes, the PDCx register controls the duty cycle of both the PWMxH and
PWMxL. The smallest pulse width that can be generated on the PWM output corresponds to a value of
0x0008, while the maximum pulse width generated corresponds to a value of 0xFFEF.
operation), the PWM duty cycle resolution will degrade from 1 LSB to 3 LSB.
SDCx register controls the PWMxL duty cycle. The smallest pulse width that can be generated on the
PWM output corresponds to a value of 0x0008, while the maximum pulse width generated corresponds to
a value of 0xFFEF.
operation), the PWM duty cycle resolution will degrade from 1 LSB to 3 LSB.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
PDCx<15:0>: PWM Generator # Duty Cycle Value bits
SDCx<15:0>: Secondary Duty Cycle for PWMxL Output Pin bits
R/W-0
R/W-0
R/W-0
R/W-0
PDCx: PWMx GENERATOR DUTY CYCLE REGISTER
SDCx: PWMx SECONDARY DUTY CYCLE REGISTER
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
PDCx<15:8>
SDCx<15:8>
PDCx<7:0>
SDCx<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
DS70318D-page 205
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0