DSPIC33FJ16GS502-E/SP Microchip Technology, DSPIC33FJ16GS502-E/SP Datasheet - Page 211

16 Bit MCU/DSP 40MIPS 16 KB FLASH SMPS 28 SPDIP .300in TUBE

DSPIC33FJ16GS502-E/SP

Manufacturer Part Number
DSPIC33FJ16GS502-E/SP
Description
16 Bit MCU/DSP 40MIPS 16 KB FLASH SMPS 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS502-E/SP

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REGISTER 15-13: TRGCONx: PWMx TRIGGER CONTROL REGISTER
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7
bit 6
bit 5-0
Note 1:
DTM
R/W-0
R/W-0
(1)
The secondary generator cannot generate PWM trigger interrupts.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
TRGDIV<3:0>: Trigger # Output Divider bits
0000 = Trigger output for every trigger event
0001 = Trigger output for every 2nd trigger event
0010 = Trigger output for every 3rd trigger event
0011 = Trigger output for every 4th trigger event
0100 = Trigger output for every 5th trigger event
0101 = Trigger output for every 6th trigger event
0110 = Trigger output for every 7th trigger event
0111 = Trigger output for every 8th trigger event
1000 = Trigger output for every 9th trigger event
1001 = Trigger output for every 10th trigger event
1010 = Trigger output for every 11th trigger event
1011 = Trigger output for every 12th trigger event
1100 = Trigger output for every 13th trigger event
1101 = Trigger output for every 14th trigger event
1110 = Trigger output for every 15th trigger event
1111 = Trigger output for every 16th trigger event
Unimplemented: Read as ‘0’
DTM: Dual Trigger Mode bit
1 = Secondary trigger event is combined with the primary trigger event to create the PWM trigger.
0 = Secondary trigger event is not combined with the primary trigger event to create the PWM trigger.
Unimplemented: Read as ‘0’
TRGSTRT<5:0>: Trigger Postscaler Start Enable Select bits
000000 = Wait 0 PWM cycles before generating the first trigger event after the module is enabled
000001 = Wait 1 PWM cycles before generating the first trigger event after the module is enabled
000010 = Wait 1 PWM cycles before generating the first trigger event after the module is enabled
111111 = Wait 63 PWM cycles before generating the first trigger event after the module is enabled
R/W-0
Two separate PWM triggers are generated.
U-0
TRGDIV<3:0>
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
(1)
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
TRGSTRT<5:0>
R/W-0
U-0
x = Bit is unknown
R/W-0
U-0
DS70318D-page 209
R/W-0
U-0
bit 8
bit 0

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