DSPIC33FJ16GS502-E/SP Microchip Technology, DSPIC33FJ16GS502-E/SP Datasheet - Page 213

16 Bit MCU/DSP 40MIPS 16 KB FLASH SMPS 28 SPDIP .300in TUBE

DSPIC33FJ16GS502-E/SP

Manufacturer Part Number
DSPIC33FJ16GS502-E/SP
Description
16 Bit MCU/DSP 40MIPS 16 KB FLASH SMPS 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS502-E/SP

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REGISTER 15-14: IOCONx: PWMx I/O CONTROL REGISTER (CONTINUED)
© 2009 Microchip Technology Inc.
bit 3-2
bit 1
bit 0
Note 1: These bits should be changed only when PTEN = 0. Changing the clock selection during operation will
yield unpredictable results.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
CLDAT<1:0>: Data for PWMxH and PWMxL Pins if CLMODE is Enabled bits
FCLCONx<IFLTMOD> = 0: Normal Fault mode:
If current-limit active, then CLDAT<1> provides data for PWMxH.
If current-limit active, then CLDAT<0> provides data for PWMxL.
FCLCONx<IFLTMOD> = 1: Independent Fault mode:
CLDAT<1:0> is ignored.
SWAP<1:0>: SWAP PWMxH and PWMxL pins
1 = PWMxH output signal is connected to PWMxL pin and PWMxL signal is connected to PWMxH pins
0 = PWMxH and PWMxL pins are mapped to their respective pins
OSYNC: Output Override Synchronization bit
1 = Output overrides via the OVRDAT<1:0> bits are synchronized to the PWM time base
0 = Output overrides via the OVDDAT<1:0> bits occur on next CPU clock boundary
Preliminary
DS70318D-page 211

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