DSPIC33FJ16MC304-E/PT Microchip Technology, DSPIC33FJ16MC304-E/PT Datasheet - Page 58

• Manufacturer Part Number: DSPIC33FJ16MC304-E/PT
• Description: 16-bit DSC, 16KB Flash,Motor,40 MIPS,nanoWatt 44 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16MC304-E/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC33FJ16MC304-E/PTTR; DSPIC33FJ16MC304-E/PTTR

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
5.2
The dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
Flash program memory array is organized into rows of 64
instructions or 192 bytes. RTSP allows the user
application to erase a page of memory, which consists of
eight rows (512 instructions) at a time, and to program
one row or one word at a time.
erase and programming times. The 8-row erase pages
and single row write rows are edge-aligned from the
beginning of program memory, on boundaries of 1536
bytes and 192 bytes, respectively.
The program memory implements holding buffers that
can contain 64 instructions of programming data. Prior
to the actual programming operation, the write data
must be loaded into the buffers sequentially. The
instruction words loaded must always be from a group
of 64 boundary.
The basic sequence for RTSP programming is to set up
a Table Pointer, then do a series of TBLWT instructions
to load the buffers. Programming is performed by
setting the control bits in the NVMCON register. A total
of 64 TBLWTL and TBLWTH instructions are required
to load the instructions.
All of the table write operations are single-word writes
(two instruction cycles) because only the buffers are
written.
programming each row.
5.3
A complete programming sequence is necessary for
programming or erasing the internal Flash in RTSP
mode.
programming operation is finished.
The programming time depends on the FRC accuracy
(see
Accuracy”) and the value of the FRC Oscillator Tuning
register (see
calculate the minimum and maximum values for the
Row Write Time, Page Erase Time, and Word Write
Cycle Time parameters (see
Characteristics: Program
EQUATION 5-1:
DS70283H-page 58
--------------------------------------------------------------------------------------------------------------------------- -
7.37 MHz
Table
The
RTSP Operation
Programming Operations
A
24-18,
Register
×
programming
processor
(
FRC Accuracy
“AC Characteristics: Internal RC
8-4). Use the following formula to
PROGRAMMING TIME
T
stalls
Memory”).
cycle
Table 24-12
)%
×
Table
(waits)
(
FRC Tuning
is
required
24-12,
shows typical
until
)%
“DC
the
for
For example, if the device is operating at +125° C, the
FRC accuracy will be ±5%. If the TUN<5:0> bits (see
Register
write time is equal to
EQUATION 5-2:
The maximum row write time is equal to
EQUATION 5-3:
Setting the WR bit (NVMCON<15>) starts the opera-
tion, and the WR bit is automatically cleared when the
operation is finished.
5.4
Two SFRs are used to read and write the program
Flash memory: NVMCON and NVMKEY.
The NVMCON register
blocks are to be erased, which memory type is to be
programmed and the start of the programming cycle.
NVMKEY is a write-only register that is used for write
protection. To start a programming or erase sequence,
the user application must consecutively write 0x55 and
0xAA to the NVMKEY register. Refer to
“Programming Operations”
T
T
RW
RW
=
=
----------------------------------------------------------------------------------------------- - 1.586ms
7.37 MHz
----------------------------------------------------------------------------------------------- - 1.435ms
7.37 MHz
8-4) are set to ‘b111111,the minimum row
Control Registers
×
×
(
(
11064 Cycles
11064 Cycles
1 0.05
1
Equation
–
+
MINIMUM ROW WRITE
TIME
MAXIMUM ROW WRITE
TIME
0.05
© 2011 Microchip Technology Inc.
(Register
)
)
×
×
for further details.
5-2.
(
(
1 0.00375
1 0.00375
–
–
5-1) controls which
Equation
Section 5.3
)
)
=
=
5-3.