5492GPIB B&K Precision, 5492GPIB Datasheet - Page 73
5492GPIB
Manufacturer Part Number
5492GPIB
Description
DMM BENCH 5 1/2DGT WITH GPIB CRD
Manufacturer
B&K Precision
Type
Digital (DMM)r
Specifications of 5492GPIB
Includes
Test Leads
Style
Bench
Display Digits
5.5
Display Type
VFD, Dual
Display Count
120000
Function
Voltage, Current, Resistance, Frequency
Functions, Extra
Continuity, dB, Diode Test
Features
Hold, Min/Max, RS-232 Port
Ranging
Auto/Manual
Response
True RMS
Accuracy
+/- 0.012 %
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
!
The Service Request Enable Register that enables or disables (i.e., masks )
corresponding summary messages in the Status Byte Register. The SRE is cleared
at power up. Refer to “ Status Byte Register ” for the bit functions.
!
Bit 0 (OPC) - Operation complete. This bit is generated in response to the *OPC
Bit 1 is not used. (Always set to 0 )
Bit 2 (QYE) - Query Error. Attempt has been made to read the Output Queue
Bit 3 (DDE) - Device-Dependent Error. Incorrect input during calibration, or
Bit 4 (EXE) - Execution Error. Parameter is wrong or unknown.
Bit 5 (CME) - Command Error. Command is wrong or unknown.
Bit 6 is not used. (Always set to 0)
Bit 7 (PON) - Power On. Power has been cycled off and on since the last time the
Note: 1. The Standard Event Status Register can be read by the *ESR? query.
Use *SRE to write to this register and *SRE? to read this register.
PON
Bit7
Service Request Enable Register ( SRE )
Standard Event Status Register ( ESR)
2. The register is cleared at power up or use *ESR? and *CLS commands.
Bit6
0
command and indicates that the interface is ready to accept another
message.
when no output is present or pending. Or, both input and output
buffer are full.
RS-232 input buffer overflow.
ESR was read.
CME
Bit5
EXE
Bit4
73
DDE
Bit3
QYE
Bit2
Bit1
0
OPC
Bit0