UDA1341TSDB NXP Semiconductors, UDA1341TSDB Datasheet - Page 26

• Manufacturer Part Number: UDA1341TSDB
• Description: Audio CODECs AUDIO CODEC MINIDISC
• Manufacturer: NXP Semiconductors

Specifications of UDA1341TSDB

• Number Of Adc Inputs: 4
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPs
• Interface Type: Serial (I2S), L3
• Resolution: 20 bit
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Minimum Operating Temperature: - 20 C
• Number Of Channels: 2
• Snr: 100 dB
• Supply Current: 12.5 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: UDA1341TS/N1,512

NXP Semiconductors
12 AC CHARACTERISTICS (DIGITAL)
V
unless otherwise specified.
2002 May 16
System clock timing (see Fig.8)
T
t
t
Serial input/output data timing (see Fig.9)
T
t
t
t
t
t
t
t
t
t
t
t
Microcontroller L3-interface timing (see Figs 5 and 6)
T
t
t
t
t
t
t
t
t
t
DDD
CWL
CWH
BCK(H)
BCK(L)
r
f
s;DATI
h;DATI
d;DATO(BCK)
d;DATO(WS)
h;DATO
s;WS
h;WS
CLK(L3)H
CLK(L3)L
su(L3)A
h(L3)A
su(L3)D
h(L3)D
su(L3)DA
h(L3)DA
stp(L3)
sys
cy
cy(CLK)(L3)
Economy audio CODEC for MiniDisc (MD)
home stereo and portable applications
SYMBOL
= V
DDA
= 2.7 to 3.6 V; T
clock cycle time
LOW-level pulse width
HIGH-level pulse width
bit clock cycle time
bit clock HIGH time
bit clock LOW time
rise time
fall time
data input set-up time
data input hold time
data output delay time
(from BCK falling edge)
data output delay time
(from WS edge)
data output hold time
word select set-up time
word select hold time
L3CLOCK
L3CLOCK HIGH time
L3CLOCK LOW time
L3MODE set-up time
L3MODE hold time
L3MODE set-up time
L3MODE hold time
L3DATA set-up time
L3DATA hold time
L3MODE halt time
PARAMETER
amb
= −20 to +85 °C; all voltages measured with respect to ground (pins 1, 11 and 27);
f
f
f
f
f
f
f
MSB-justified format
addressing mode
addressing mode
data transfer mode
data transfer mode
data transfer and
addressing mode
data transfer and
addressing mode
sys
sys
sys
sys
sys
sys
sys
= 256f
= 384f
= 512f
< 19.2 MHz
≥ 19.2 MHz
< 19.2 MHz
≥ 19.2 MHz
CONDITIONS
s
s
s
26
78
52
39
0.30T
0.40T
0.30T
0.40T
300
100
100
−
−
20
0
−
−
0
20
10
500
250
250
190
190
190
190
190
30
190
MIN.
sys
sys
sys
sys
88
59
44
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
TYP.
UDA1341TS
Product specification
131
87
66
0.70T
0.60T
0.70T
0.60T
−
−
−
20
20
−
−
80
80
−
−
−
−
−
−
−
−
−
−
−
−
−
MAX.
sys
sys
sys
sys
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT