Si5351B-A-GU Silicon Laboratories Inc, Si5351B-A-GU Datasheet - Page 33

Clock Generators & Support Products AnyRate 2 PLL 125MHz Clk w/VCXO&I2C 8out

Si5351B-A-GU

Manufacturer Part Number
Si5351B-A-GU
Description
Clock Generators & Support Products AnyRate 2 PLL 125MHz Clk w/VCXO&I2C 8out
Manufacturer
Silicon Laboratories Inc
Type
Any Frequency CMOS Clock Generatorr
Datasheets

Specifications of Si5351B-A-GU

Mounting Style
SMD/SMT
Max Input Freq
0.008 MHz
Max Output Freq
133 MHz
Number Of Outputs
8
Operating Supply Voltage
3.3 V
Operating Temperature Range
- 40 C to + 85 C
Supply Current
25 mA
Package / Case
QSOP-24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Reset value = 0000 0000
Register 19. CLK3 Control
Name
3:2
1:0
Bit
Type
7
6
5
4
Bit
CLK3_IDRV[1:0] CLK3 Output Rise and Fall time / Drive Strength Control.
CLK3_SRC[1:0] Output Clock 3 Input Source.
CLK3_PDN
CLK3_PDN
MS3_SRC
CLK3_INV
MS3_INT
Name
R/W
D7
MS3_INT
R/W
Clock 3 Power Down.
This bit allows powering down the CLK3 output driver to conserve power when the out-
put is unused.
0: CLK3 is powered up.
1: CLK3 is powered down.
MultiSynth 3 Integer Mode.
This bit can be used to force MS3 into Integer mode to improve jitter performance.
Note that the fractional mode is necessary when a delay offset is specified for CLK3.
0: MS3 operates in fractional division mode.
1: MS3 operates in integer mode.
MultiSynth Source Select for CLK3.
0: Select PLLA as the source for MultiSynth0.
1: Select PLLB (Si5351A/C only) or VCXO (Si5351B only) MultiSynth0.
Output Clock 3 Invert.
0: Output Clock 3 is not inverted.
1: Output Clock 3 is inverted.
These bits determine the input source for CLK3.
00: 2 mA
01: 4 mA
10: 6 mA
11: 8 mA
D6
MS3_SRC
R/W
D5
Preliminary Rev. 0.95
CLK3_INV
R/W
D4
Function
CLK3_SRC[1:0]
D3
R/W
D2
Si5351A/B/C
CLK3_IDRV[1:0]
D1
R/W
D0
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