CY28551LFXC Silicon Laboratories Inc, CY28551LFXC Datasheet - Page 21

• Manufacturer Part Number: CY28551LFXC
• Description: Clock Generators & Support Products Universal System Clk Intel AMD SiS Via
• Manufacturer: Silicon Laboratories Inc

Specifications of CY28551LFXC

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Rev 1.1, Faburary 1, 2008
AC Electrical Specifications
Crystal
T
T
T
T
L
CPU at 0.7V (SSC refers to –0.5% spread spectrum)
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
ACC
DC
PERIOD
R
CCJ
DC
PERIOD
PERIOD
PERIOD
PERIOD
PERIOD
PERIOD
PERIOD
PERIODSS
PERIODSS
PERIODSS
PERIODSS
PERIODSS
PERIODSS
PERIODSS
PERIODAbs
PERIODAbs
PERIODAbs
PERIODAbs
PERIODAbs
PERIODAbs
PERIODAbs
PERIODSSAbs
PERIODSSAbs
PERIODSSAbs
PERIODSSAbs
Parameter
/T
F
XIN Duty Cycle
XIN Period
XIN Rise and Fall Times
XIN Cycle to Cycle Jitter
Long-term Accuracy
CPUT and CPUC Duty Cycle
100 MHz CPUT and CPUC Period
133 MHz CPUT and CPUC Period
166 MHz CPUT and CPUC Period
200 MHz CPUT and CPUC Period
266 MHz CPUT and CPUC Period
333 MHz CPUT and CPUC Period
400 MHz CPUT and CPUC Period
100 MHz CPUT and CPUC Period, SSC Measured at crossing point V
133 MHz CPUT and CPUC Period, SSC Measured at crossing point V
166 MHz CPUT and CPUC Period, SSC Measured at crossing point V
200 MHz CPUT and CPUC Period, SSC Measured at crossing point V
266 MHz CPUT and CPUC Period, SSC Measured at crossing point V
333 MHz CPUT and CPUC Period, SSC Measured at crossing point V
400 MHz CPUT and CPUC Period, SSC Measured at crossing point V
100 MHz CPUT and CPUC Absolute
period
133 MHz CPUT and CPUC Absolute
Period
166 MHz CPUT and CPUC Absolute
Period
200 MHz CPUT and CPUC Absolute
Period
266 MHz CPUT and CPUC Absolute
Period
333 MHz CPUT and CPUC Absolute
Period
400 MHz CPUT and CPUC Absolute
Period
100- MHz CPUT and CPUC Absolute
Period, SSC
133 MHz CPUT and CPUC Absolute
Period, SSC
166 MHz CPUT and CPUC Absolute
Period, SSC
200 MHz CPUT and CPUC Absolute
Period, SSC
Description
The device will operate reliably with input
duty cycles up to 30/70 but the REF clock
duty cycle will not be within specification
When XIN is driven from an external
clock source
Measured between 0.3V
As an average over 1-μs duration
Over 150 ms
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
@ 1 clock
Measured at crossing point V
@ 1 clock
Measured at crossing point V
@ 1 clock
Measured at crossing point V
@ 1 clock
Measured at crossing point V
@ 1 clock
Measured at crossing point V
@ 1 clock
Measured at crossing point V
@ 1 clock
Measured at crossing point V
@ 1 clock
Measured at crossing point V
@ 1 clock
Measured at crossing point V
@ 1 clock
Measured at crossing point V
@ 1 clock
Condition
DD
and 0.7V
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
@ 0.1s
DD
9.99900
7.49925
5.99940
4.99950
3.74963
2.99970
2.49975
9.99900
7.49925
5.99940
4.99950
3.74963
2.99970
2.49975
9.91400
7.41425
5.91440
4.91450
3.66463
2.91470
2.41475
9.91400
7.41425
5.91440
4.91450
69.841
Min.
47.5
45
–
–
–
CY28551
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10.0100
7.50075
6.00060
5.00050
3.75038
3.00030
2.50025
10.0100
7.50075
6.00060
5.00050
3.75038
3.00030
2.50025
10.0860
7.58575
6.08560
5.08550
3.83538
3.08530
2.58525
10.1363
7.62345
6.11576
5.11063
Max.
52.5
71.0
10.0
500
30
55
Unit
ppm
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%