CY28551LFXC Silicon Laboratories Inc, CY28551LFXC Datasheet - Page 7

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CY28551LFXC

Manufacturer Part Number
CY28551LFXC
Description
Clock Generators & Support Products Universal System Clk Intel AMD SiS Via
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of CY28551LFXC

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Rev 1.1, Faburary 1, 2008
Byte 2: Control Register 2 (continued)
Byte 3: Control Register 3
Byte 4: Control Register 4
Bit
Bit
Bit
3
2
1
0
7
6
5
4
7
6
5
4
3
2
1
0
2
1
0
@Pup
@Pup
@Pup
0
0
0
0
0
0
0
0
1
1
1
1
0
1
1
0
1
1
1
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
48M, 24_48M
PCIEX[T/C]8
Reserved
Reserved
FSEL_D
FSEL_C
FSEL_B
FSEL_A
PCI6_F
PCIEX
LINK1
LINK0
Name
Name
CPU1
CPU0
Name
PCI2
PCI1
PCI0
REF
PCI
Allow control of CPU1 with assertion of CPU_STP#
0 = Free Running
1 = Stopped with CPU_STP#
Allow control of CPU0 with assertion of CPU_STP#
0 = Free Running
1 = Stopped with CPU_STP#
Allow control of PCI6_F with assertion of PCI_STP#
0 = Free Running
1 = Stopped with PCI_STP#
Allow control of PCIEX with assertion of PCI_STP#
0 = Free Running
1 = Stopped with PCI_STP#
SW Frequency selection bits. See Table 1.
LINK1 Output Enable
0 = Disable, 1 = Enable
LINKI0 Output Enable
0 = Disable, 1 = Enable
PCIEX[T/C]8 Output Enable
0 = Disable (Tri-state), 1 = Enable
Reserved
Reserved
33 MHz Output Drive Strength
0 = 2x, 1 = 1x
REF Output Drive Strength
0 = 2x, 1 = 1x
48 MHz and 24_48M Output Drive Strength
0 = 2x, 1 = 1x
PCI2 Output Enable
0 = Disable, 1 = Enable
PCI1 Output Enable
0 = Disable, 1 = Enable
PCI0 Output Enable
0 = Disable, 1 = Enable
Description
Description
Description
CY28551
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