LX256V-35FN484C Lattice, LX256V-35FN484C Datasheet - Page 60

• Manufacturer Part Number: LX256V-35FN484C
• Description: Analog & Digital Crosspoint ICs 256 I/O Switch Matrix, 3.3V, SERDES, 3.5ns, Pb-Free
• Manufacturer: Lattice

Specifications of LX256V-35FN484C

• Maximum Dual Supply Voltage: 3.6 V
• Minimum Dual Supply Voltage: 3 V
• Mounting Style: SMD/SMT
• Number Of Arrays: 1
• Operating Supply Voltage: 3.3 V
• Supply Type: Triple
• Configuration: 256 x 256
• Package / Case: FPBGA-484
• Data Rate: 38 Gbps
• Input Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Output Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Product: Digital Crosspoint
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
ispGDX2-128 Logic Signal Connections (Continued)
BK2_IO3
GND
BK2_IO4
BK2_IO5
BK2_IO6
BK2_IO7
BK2_IO8
BK2_IO9
BK2_IO10
BK2_IO11
GND
BK2_IO12
BK2_IO13
BK2_IO14
BK2_IO15 / VREF2
TCK
GOE2
BK3_IO0 / VREF3
BK3_IO1
BK3_IO2
BK3_IO3
GND
BK3_IO4
BK3_IO5
BK3_IO6
BK3_IO7
BK3_IO8
BK3_IO9
BK3_IO10
BK3_IO11
GND
BK3_IO12
BK3_IO13
BK3_IO14
BK3_IO15
RESET
BK4_IO0
BK4_IO1 / PLL_LOCK0 /
PLL_RST0
BK4_IO2
BK4_IO3
GND
BK4_IO4
BK4_IO5
BK4_IO6
BK4_IO7
Signal Name
sysIO
Bank
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
-
-
-
Pair/Polarity
LVDS
18N
19N
20N
21N
22N
23N
24N
25N
26N
27N
28N
29N
30N
31N
32N
33N
34N
35N
17P
18P
19P
20P
21P
22P
23P
24P
25P
26P
27P
28P
29P
30P
31P
32P
33P
34P
35P
Block MRB
GDX
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
2A
2A
2A
2A
2A
2A
2A
2A
-
-
-
-
-
-
7
7
7
7
7
7
7
7
7
7
7
7
7
10
11
12
13
14
15
10
11
12
13
14
15
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
-
-
-
-
-
-
-
HSI1A_CDRRSTb
HSI1B_CDRRSTb
HSI2A_CDRRSTb
FIFO1A_STRDb
SERDES Mode
HSI1_CSLOCK
HSI1A_SOUTN
HSI1A_SOUTP
HSI1B_SOUTP
HSI1B_SOUTN
HSI1A_SYDT
HSI1B_SYDT
HSI2A_SYDT
HSI1B_SINN
HSI1A_SINN
HSI1A_SINP
HSI1B_SINP
HSI2A_SINN
HSI2A_SINP
57
I/O Pin
Note 4
Note 4
CAL
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
5
5
5
6
HSI1A_RXD0/TXD0
HSI1A_RXD1/TXD1
HSI1A_RXD2/TXD2
HSI1A_RXD3/TXD3
HSI1A_RXD4/TXD4
HSI1A_RXD5/TXD5
HSI1A_RXD6/TXD6
HSI1A_RXD7/TXD7
HSI1A_RXD8/TXD8
HSI1A_RXD9/TXD9
HSI1B_RXD0/TXD0
HSI1B_RXD1/TXD1
HSI1B_RXD2/TXD2
HSI1B_RXD3/TXD3
HSI1B_RXD4/TXD4
HSI1B_RXD5/TXD5
HSI1B_RXD6/TXD6
HSI1B_RXD7/TXD7
HSI1B_RXD8/TXD8
HSI1B_RXD9/TXD9
HSI2A_RXD9/TXD9
HSI2A_RXD8/TXD8
HSI1A_RECCLK
HSI1B_RECCLK
HSI2A_RECCLK
SERDES Mode
HSI1B_SYDT
HSI2A_SYDT
I/O Cell
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ispGDX2 Family Data Sheet
2
5
5
FIFO1A_DIN0/DOUT0
FIFO1A_DIN1/DOUT1
FIFO1A_DIN2/DOUT2
FIFO1A_DIN3/DOUT3
FIFO1A_DIN4/DOUT4
FIFO1A_DIN5/DOUT5
FIFO1A_DIN6/DOUT6
FIFO1A_DIN7/DOUT7
FIFO1A_DIN8/DOUT8
FIFO1A_DIN9/DOUT9
FIFO1B_DIN0/DOUT0
FIFO1B_DIN1/DOUT1
FIFO1B_DIN2/DOUT2
FIFO1B_DIN3/DOUT3
FIFO1B_DIN4/DOUT4
FIFO1B_DIN5/DOUT5
FIFO1B_DIN6/DOUT6
FIFO1B_DIN7/DOUT7
FIFO1B_DIN8/DOUT8
FIFO1B_DIN9/DOUT9
FIFO2A_DIN9/DOUT9
FIFO2A_DIN8/DOUT8
FIFO1A_FIFORSTb
FIFO1B_FIFORSTb
FIFO2A_FIFORSTb
/ FIFO1B_STRDb
FIFO1B_ EMPTY
FIFO1A_EMPTY
FIFO2A_EMPTY
FIFO Mode I/O
FIFO1B_FULL
FIFO2A_FULL
Cell/Pin
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3
fpBGA
GND
GND
GND
GND
GND
G13
G14
D16
C16
D15
D14
C13
D12
C12
C11
D10
C10
F16
F14
F15
E15
E13
E14
C15
R14
B14
A15
B13
A14
A13
B12
B11
B10
A10
208
C9
C8
A6
C7
D7
C6
B5
A9
A7
B7
B6