LAN91C96I-MU SMSC, LAN91C96I-MU Datasheet - Page 44
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LAN91C96I-MU
Manufacturer Part Number
LAN91C96I-MU
Description
Ethernet ICs Non-PCI 10 Mbps Ethernet MAC
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet
1.LAN91C96-MU.pdf
(125 pages)
Specifications of LAN91C96I-MU
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 Mbps, 100 Mbps
Supply Voltage (max)
5 V
Supply Voltage (min)
0 V
Supply Current (max)
95 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
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LAN91C96I-MU
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Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
NOCRC - Does not append CRC to transmitted frames when set, allows software to insert the desired
CRC. Defaults to zero, namely CRC inserted.
FDSE - Full Duplex Switched Ethernet. When set, the LAN91C96 is configured for Full Duplex Switched
Ethernet, it defaults clear to normal CSMA/CD protocol. In FDSE mode the LAN91C96 transmit and
receive processes are fully independent, namely no deferral and no collision detection are implemented.
When FDSE is set, FDUPLX is internally assumed high and MON_CSN is assumed low regardless of their
actual values.
Reserved – Must be 0.
EPH_LOOP - Internal loopback at the EPH block. Does not exercise the encoder decoder. Serial data is
looped back when set. Defaults low. Note: After exiting the loopback test, an SRESET in the ECOR or the
SOFT_RST in the RCR must be set before returning to normal operation.
STP_SQET - Stop transmission on SQET error. If set, stops and disables transmitter on SQE test error.
Does not stop on SQET error and transmits next frame if clear. Defaults low.
FDUPLX - When set it enables full duplex operation. This will cause frames to be received if they pass the
address filter regardless of the source for the frame. When clear the node will not receive a frame sourced
by itself. Clearing this bit (Normal Operation), allows in promiscuous mode, not to receive it’s own packet.
TXP_EN - This bit is reserved and should always be set to 0 on the LAN91C96.
MON_CSN - When set the LAN91C96 monitors carrier while transmitting. It must see its own carrier by the
end of the preamble. If it is not seen, or if carrier is lost during transmission, the transmitter aborts the
frame without CRC and turns itself off.
When this bit is clear the transmitter ignores its own carrier. Defaults low.
PAD_EN - When set, the LAN91C96 will pad transmit frames shorter than 64 bytes with 00. For TX, CPU
should write the actual BYTE COUNT before padded by the LAN91C96 to the buffer RAM, excludes the
padded 00. When this bit is cleared, the LAN91C96 does not pad frames.
FORCOL - When set the transmitter will force a collision by not deferring deliberately. After the collision
this bit is reset automatically. This bit defaults low to normal operation.
LOOP - Local Loopback. When set, transmit frames are internally looped to the receiver after the
encoder/decoder. Collision and Carrier Sense are ignored. No data is sent out. Defaults low to normal
mode.
TXENA - Transmit enabled when set. Transmit is disabled if clear. When the bit is cleared the LAN91C96
will complete the current transmission before stopping. When stopping due to an error, this bit is
automatically cleared.
Revision 1.0 (10-24-08)
Page 44
SMSC LAN91C96 5v&3v
DATASHEET