LAN91C96I-MU SMSC, LAN91C96I-MU Datasheet - Page 7
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LAN91C96I-MU
Manufacturer Part Number
LAN91C96I-MU
Description
Ethernet ICs Non-PCI 10 Mbps Ethernet MAC
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet
1.LAN91C96-MU.pdf
(125 pages)
Specifications of LAN91C96I-MU
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 Mbps, 100 Mbps
Supply Voltage (max)
5 V
Supply Voltage (min)
0 V
Supply Current (max)
95 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN91C96I-MU
Manufacturer:
Standard
Quantity:
2 111
Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
Chapter 1 General Description
SMSC LAN91C96 5v&3v
The LAN91C96 is a VLSI Ethernet Controller that combines Local Bus, PCMCIA, and Motorola 68000 bus
interfaces in one chip. LAN91C96 integrates all MAC and physical layer functions, as well as the packet
RAM, needed to implement a high performance 10BASE-T (twisted pair) node. For 10BASE5 (thick coax),
10BASE2 (thin coax), and 10BASE-F (fiber) implementations, the LAN91C96 interfaces to external
transceivers via the provided AUI port. Only one additional IC is required for most applications. The
LAN91C96 comes with Full Duplex Switched Ethernet (FDSWE) support allowing the controller to provide
much higher throughput. 6K bytes of RAM is provided to support enhanced throughput and compensate
for any increased system service latencies. The controller implements multiple advanced power-down
modes including Magic Packet to conserve power and operate more efficiently. The LAN91C96 can
directly interface with the Local Bus, PCMCIA, and 68000 buses and deliver no-wait-state operation. For
Local Bus and PCMCIA interfaces, the LAN91C96 occupies 16 I/0 locations and no memory space except
for PCMCIA attribute memory space. The same I/O space is used for both LOCAL BUS and PCMCIA
operations. Its shared memory is sequentially accessed with 40ns access times to any of its registers,
including its packet memory. DMA services are not used by the LAN91C96, virtually de-coupling network
traffic from local or system bus utilization. For packet memory management, the LAN91C96 integrates a
unique hardware Memory Management Unit (MMU) with enhanced performance and decreased software
overhead when compared to ring buffer and linked list architectures. The LAN91C96 is portable to
different CPU and bus platforms due to its flexible bus interface, flat memory structure (no pointers), and
its loosely coupled buffered architecture (not sensitive to latency).
The LAN91C96 is available in 100-pin QFP and TQFP (1.0 mm body thickness) packages. The low profile
TQFP is ideal for mobile applications such as PC Card LAN adapters. The LAN91C96 operates with a
single power supply voltage of 5.0V. Revisions E and later will also operate using a single 3.3V power
supply.
DATASHEET
Page 7
Revision 1.0 (10-24-08)