LAN9500-ABZJ-TR SMSC, LAN9500-ABZJ-TR Datasheet - Page 16
LAN9500-ABZJ-TR
Manufacturer Part Number
LAN9500-ABZJ-TR
Description
Ethernet ICs USB 2.0 to 10/100 Ethernet CTRL TR
Manufacturer
SMSC
Datasheet
1.LAN9500-ABZJ.pdf
(64 pages)
Specifications of LAN9500-ABZJ-TR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Revision 1.0 (05-17-10)
NUM PINS
1
1
1
1
Note 3.2
Power Select
Configuration
Configuration
Chip Select
Auto-MDIX
EEPROM
EEPROM
EEPROM
EEPROM
Data Out
Data In
Enable
NAME
Clock
Strap
Strap
Configuration strap values are latched on power-on reset and system reset. Configuration
straps are identified by an underlined symbol name. Signals that function as configuration
straps must be augmented with an external resistor when connected to a load.
AUTOMDIX_EN
PWR_SEL
SYMBOL
EECLK
EEDO
EECS
EEDI
Table 3.2 EEPROM Pins
DATASHEET
BUFFER
TYPE
(PD)
(PU)
(PU)
(PD)
(PD)
O8
O8
O8
IS
IS
IS
16
This pin is driven by the EEDO output of the
external EEPROM.
This pin drives the EEDI input of the external
EEPROM.
Determines the default Auto-MDIX setting.
0 = Auto-MDIX is disabled.
1 = Auto-MDIX is enabled.
See
configuration straps.
This pin drives the chip select output of the
external EEPROM.
Note:
This pin drives the EEPROM clock of the external
EEPROM.
Determines the default power setting when no
EEPROM is present.
0 = The device is bus powered.
1 = The device is self powered.
See
configuration straps.
Note 3.2
Note 3.2
The EECS output may tri-state briefly
during power-up. Some EEPROM
devices may be prone to false selection
during this time. When an EEPROM is
used, an external pull-down resistor is
recommended on this signal to prevent
false selection. Refer to your EEPROM
manufacturer’s datasheet for additional
information.
for more information on
for more information on
DESCRIPTION
USB 2.0 to 10/100 Ethernet Controller
SMSC LAN950x Family
Datasheet
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