LAN9500-ABZJ-TR SMSC, LAN9500-ABZJ-TR Datasheet - Page 57

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LAN9500-ABZJ-TR

Manufacturer Part Number
LAN9500-ABZJ-TR
Description
Ethernet ICs USB 2.0 to 10/100 Ethernet CTRL TR
Manufacturer
SMSC
Datasheet

Specifications of LAN9500-ABZJ-TR

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
USB 2.0 to 10/100 Ethernet Controller
Datasheet
SMSC LAN950x Family
8.5.5
SYMBOL
t
t
t
t
t
hold
clkp
clkh
clkl
val
MII Interface Timing
This section specifies the MII interface transmit and receive timing.
Note 8.14 Timing was designed for system load between 10 pf and 25 pf.
TXD[3:0]
TXCLK period
TXCLK high time
TXCLK low time
TXD[3:0], TXEN output valid from rising edge of
TXCLK
TXD[3:0], TXEN output hold from rising edge of
TXCLK
TXCLK
TXEN
DESCRIPTION
t
hold
Table 8.18 MII Transmit Timing Values
Figure 8.5 MII Transmit Timing
t
DATASHEET
val
t
clkh
t
clkp
57
t
clkl
t
val
t
t
clkp
clkp
MIN
40
0
*0.4
*0.4
t
t
t
hold
clkp
clkp
MAX
22.0
*0.6
*0.6
UNITS
t
Revision 1.0 (05-17-10)
val
ns
ns
ns
ns
ns
Note 8.14
Note 8.14
NOTES

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