LX128EC-32F208C Lattice, LX128EC-32F208C Datasheet - Page 5

• Manufacturer Part Number: LX128EC-32F208C
• Description: Analog & Digital Crosspoint ICs E-Series, 128 I/O Switch Matrix, 1.8V, 3.2ns
• Manufacturer: Lattice

Specifications of LX128EC-32F208C

• Maximum Dual Supply Voltage: 1.95 V
• Minimum Dual Supply Voltage: 1.65 V
• Mounting Style: SMD/SMT
• Number Of Arrays: 1
• Operating Supply Voltage: 1.8 V
• Supply Type: Triple
• Configuration: 128 x 128
• Package / Case: FPBGA-208
• Data Rate: 21 Gbps
• Input Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Output Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Product: Digital Crosspoint
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 1. ispGDX2 Block Diagram (256-I/O Device)
Introduction
The ispGDX2™ family is Lattice’s second generation in-system programmable generic digital crosspoint switch for
high speed bus switching and interface applications.
The ispGDX2 family is available in two options. The standard device supports sysHSI capability for ultra fast serial
communications while the lower-cost “E-series” supports the same high-performance FPGA fabric without the
sysHSI Block.
This family of switches combines a flexible switching architecture with advanced sysIO interfaces including high
performance sysHSI Blocks, and sysCLOCK PLLs to meet the needs of the today’s high-speed systems. Through
a muliplexer-intensive architecture, the ispGDX2 facilitates a variety of common switching functions.
The availability of on-chip control logic further enhances the power of these devices. A high-performance solution,
the family supports bandwidth up to 38Gbps.
Every device in the family has a number of PLLs to provide the system designer with the ability to generate multiple
clocks and manage clock skews in their systems.
sysCLOCK
sysCLOCK
PLL
PLL
sysHSI
sysHSI
Block
Block
GDX Block
GDX Block
SERDES
SERDES
FIFO
FIFO
sysIO Bank
sysIO Bank
GDX Block
GDX Block
SERDES
SERDES
FIFO
Global Routing Pool
FIFO
(GRP)
2
GDX Block
GDX Block
SERDES
SERDES
FIFO
FIFO
sysIO Bank
sysIO Bank
GDX Block
GDX Block
SERDES
SERDES
FIFO
FIFO
ispGDX2 Family Data Sheet
sysHSI
sysHSI
Block
Block
ISP & Boundary Scan
sysCLOCK
sysCLOCK
Test Port
PLL
PLL