LAN91C100FDTQFP SMSC, LAN91C100FDTQFP Datasheet - Page 33
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LAN91C100FDTQFP
Manufacturer Part Number
LAN91C100FDTQFP
Description
Ethernet ICs Non-PCI 10/100 Ethernet MAC
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet
1.LAN91C100FD-ST.pdf
(77 pages)
Specifications of LAN91C100FDTQFP
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 Mbps, 100 Mbps
Supply Voltage (max)
7 V
Supply Voltage (min)
0.3 V
Supply Current (max)
40 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN91C100FDTQFP
Manufacturer:
SMSC
Quantity:
1 831
Part Number:
LAN91C100FDTQFP
Manufacturer:
SMSC
Quantity:
20 000
Note:
BANK 2
Note:
BANK 2
SMSC LAN91C100FD Rev. D
FEAST Fast Ethernet Controller with Full Duplex Capability
BYTE
BYTE
HIGH
LOW
BYTE
BYTE
HIGH
LOW
OFFSET
OFFSET
ALLOCATED PACKET NUMBER - Packet number associated with the last memory allocation request.
The value is only valid if the FAILED bit is clear.
For software compatibility with future versions, the value read from the ARR after an allocation request is
intended to be written into the PNR as is, without masking higher bits (provided FAILED = 0).
This register provides access to the read ports of the Receive FIFO and the Transmit completion FIFO.
The packet numbers to be processed by the interrupt service routines are read from this register.
REMPTY - No receive packets queued in the RX FIFO. For polling purposes, uses the RCV_INT bit in the
Interrupt Status Register.
TOP OF RX FIFO PACKET NUMBER - Packet number presently at the output of the RX FIFO. Only valid
if REMPTY is clear. The packet is removed from the RX FIFO using MMU Commands 3) or 4).
TEMPTY - No transmit packets in completion queue. For polling purposes, uses the TX_INT bit in the
Interrupt Status Register.
TX DONE PACKET NUMBER - Packet number presently at the output of the TX Completion FIFO. Only
valid if TEMPTY is clear. The packet is removed when a TX INT acknowledge is issued.
For software compatibility with future versions, the value read from each FIFO register is intended to be
written into the PNR as is, without masking higher bits (provided TEMPTY and REMPTY = 0 respectively).
POINTER REGISTER - The value of this register determines the address to be accessed within the
transmit or receive areas. It will auto-increment on accesses to the data register when AUTO INCR. is set.
The increment is by one for every byte access, by two for every word access, and by four for every double
word access. When RCV is set the address refers to the receive area and uses the output of RX FIFO as
the packet number, when RCV is clear the address refers to the transmit area and uses the packet number
at the Packet Number Register.
4
6
REMPTY
TEMPTY
1
1
RCV
0
0
FIFO PORTS REGISTER
AUTO
INCR.
POINTER REGISTER
0
0
0
0
0
0
NAME
NAME
READ
0
0
0
0
DATASHEET
Reserved
Page 33
POINTER LOW
0
0
0
0
TX DONE PACKET NUMBER
RX FIFO PACKET NUMBER
NOT EMPTY is a read
EMPTY
READ/WRITE
NOT
READ ONLY
0
0
0
0
only bit
TYPE
TYPE
0
0
0
0
POINTER HIGH
0
0
SYMBOL
SYMBOL
0
0
FIFO
PTR
Revision 1.0 (09-22-08)
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0
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