STV0056A STMicroelectronics, STV0056A Datasheet

Page 1

... HEX HEX LOW POWER STAND-BY MODE WITH AC- TIVE AUDIO AND VIDEO MATRIXES DESCRIPTION The STV0056A BICMOS integrated circuit realizes all the necessary signal processing from the tuner to the Audio/Video input and output connectors regardless the satellite system. September 1996 This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without no tice. ...

Page 2

... STV0056A PIN ASSIGNMENT Pin Number Name LEVEL VID RTN 5 S3 VID RTN 6 VOL VID OUT 8 S1 VID OUT 9 S2 VID OUT 10 VOL VID RTN 12 S2 OUT L 13 CLAMP OUT R 15 UNCL DEEM 16 VIDEEM2/22kHz 17 V 12V 18 VIDEEM1 19 V GND 20 B-BAND RTN L 22 ...

Page 3

... It is also required for the Noise reduction circuit to provide accurate roll-off fre- quencies. This pin should not be decoupled as it would inject current noise. The target current thus a 47.5k STV0056A 1% is required. 3/26 ...

Page 4

... STV0056A PIN DESCRIPTION (continued) A 12V Double bonded main power pin for the audio/FM section of the chip. The two bond connections are to the ESD and to power the circuit and on chip regulators/references. A GND L This ground pin is double bonded : 1) to channel LEFT : RF section & VCO both AGC amplifiers, channel LEFT and RIGHT audio filter section ...

Page 5

... HA Hardware address with internal 135 A pull down. Chip address is 06 when this pin is grouded and chip address is 46 when connected to V STV0056A 5.5MHz BW PP < Video on OUT 2 C bus con ...

Page 6

... Pa nda + De empha s is 22kHz to LNB STV0056A VIDEO PROCESSING BLOCK DIAGRAM LPF 29 I/O/22kHz B-BAND CLAMP IN CLAMP 13 5 CLAMP S3 VID RTN CLAMP 11 S2 VID RTN 4 CLAMP S1 VID RTN STV0056A 6/ Vide o Matrix TV, VCR/De code r Audio 3 Matrix + Volume Bus Inte rface NTSC PAL VIDEEM2/22kHz VIDEEM1 ...

Page 7

... Decoder Return DECODER AUDIO PROCESSING BLOCK DIAGRAM (CHANNEL LEFT) ANRS AUDIO 6dB -6dB PLL FILTER Audio Audio Decoder Out Decoder Return DECODER AUDIO c DEEMPHASIS 6dB -6dB VCR AUDIO c DEEMPHASIS 6dB -6dB VCR STV0056A STV0056A K1 MONO STEREO 6 TV STV0056A K1 MONO STEREO 10 TV 7/26 ...

Page 8

... FM DEMODULATION BLOCK DIAGRAM AGC FM IN LEVEL DETECTOR 1 AGC R LEVEL DETECTOR 2 Amp. Detect AMPLK R V Reg8 b4 REF AGC LEVEL DETECTOR 1 AGC L LEVEL DETECTOR 2 Amp. Detect AMPLK L V Reg8 b0 REF STV0042/STV0056A 8/ ANRS input non-scrambled audio 4 b ANRS input descrambled audio ANRS, No De-emphasis ANRS ...

Page 9

... J17 de-emphasis de-emphasisis required, this can be inserted by an internal switch, thus allowing a worldwide applica- tion. The STV0056A is intended to be compatible with Wegener Panda System. Two types of audio outputs are provided : one is a fixed 1V and the other is a gain controlled ...

Page 10

... STV0056A ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Supply Voltage Total Power Dissipation tot T Operating Ambient Temperature oper T Storage Temperature stg THERMAL DATA Symbol Parameter Rth(j-a) Thermal Resistance Junction-ambient DC AND AC ELECTRICAL CHARACTERISTICS 12V 5V unless otherwise specified amb Symbol Parameter V Sypply Voltage Supply Current ...

Page 11

... No pre-emphasis, No noise reduction FM input as for APA50 75 s de-emphasis, 27k //2.7nF load No pre-emphasis, No noise reduction FM input as for APA50 J17 de-emphasis, 36k 4.7k 8.2nF load No pre-emphasis, No noise reduction 1kHz 2V - 1kHz from Aux input pins PP STV0056A Typ. Max. Unit 4.8 V 1.5 1.9 2. 2.0 3.3 4.0 ...

Page 12

... STV0056A DC AND AC ELECTRICAL CHARACTERISTICS (continued 12V 5V unless otherwise specified amb Symbol Parameter AUXILIARY AUDIO OUTPUT (Pins S2 OUT R, S2 OUT L, S3 OUT R, S3 OUT L) (continued) THDAOFM THD Audio Output Impedance OUT L Z OUT H I/O V Low Level Input IL V High Level Input IH V Low Level Output ...

Page 13

... VIDEEM1 Ron of the transistor gate is 10k . Figure VIDEEM1 S3 VID OUT V 2.4V REF VIDEEM2 / 22kHz Ron of the transistor gate is 10k . Figure VIDEEM2/2 2kHz 100 /2 2.4V REF 60 /2 STV0056A V 12V CC UNCL DEEM 10k 25k V 2.4V REF 16.7k GND 0V 1 125 A 1 125 22kHz ...

Page 14

... STV0056A PIN INTERNAL CIRCUITRY (continued) VID IN Figure 7 V 2.4V REF 10k VID IN 1 6.5k + 0.5pF 85 A GND 0V PK OUT R, PK OUT L Figure Clamp DD 3.4V Audio Peak Detector Ivar is controlled by the peak det audio level max (1V audio). PP Figure Ivar VOL OUT R, VOL OUT L ...

Page 15

... An offset on the PLL loop filter will cause an offset in the two 1 A currents that will prevent the PLL from drifting-off frequency. Figure 21 100 A CPUMP L CPUMP R Dig Synth 100 A DET L, DET (phase error). Figure 22 DET L DET R STV0056A GND 0V 3 460 5pF GND 0V 750 Loop Filter Tracking 1 A VCO Input I2 ...

Page 16

... STV0056A PIN INTERNAL CIRCUITRY (continued) AMPLK L, AMPLK R, AGC L, AGC R I2 and I1 from the amplitude detecting mixer. Figure 23 To VCA AMPLK L AMPLK 10k 160 A V 2.4V REF V REF The 400 A source is off during stand-by mode. Figure 24 Vbg 1.2V 4 10k 400 A 10k GND 0V ...

Page 17

... C PROTOCOL 1) WRITING to the chip S-Start Condition P-Stop Condition CHIP ADDR - 7 bits. Programmable 06H or 46H (STV0056A only) with Pin HA. W-Write/Read bit is the 8th bit of the chip address. A-ACKNOWLEDGE after receiving 8 bits of data/adress. REG ADDR Address of register to be written to, 8 bits of which bits & 7 are ’X’ or don’ ...

Page 18

... L FM deviation selection deviation selection deviation selection (L = double the FM deviation Select 22kHz for I/O (Pin 29 / STV0056A Select TP50a (H) or I/O (Pin 29 / STV0056A). TP50a for test only. Reg 6 write/read Bit (default 86 ) HEX 0 L Status of I Select data direction of I output Select frequency synthesizer 1 OFF/ OFF) ...

Page 19

... Read frequency of watchdog 2 - bit 2 of 10-bit value 1 Read frequency of watchdog 2 2 Read frequency of watchdog 2 3 Read frequency of watchdog 2 4 Read frequency of watchdog 2 5 Read frequency of watchdog 2 6 Read frequency of watchdog 2 7 Read frequency of watchdog 2 - bit 9, MSB (10th bit) of 10-bit STV0056A 19/26 ...

Page 20

... STV0056A CONTROL REGISTERS (continued) Video Mux Truth Tables Register 2 <0:2> Scart 1 video output control Register 3 <0:2> Scart 2 video output control Register 4 <0:2> Scart 3 decoder output control The truth table for the three scart outputs are the same. Register 2/3/4 Bit<2> Bit<1> ...

Page 21

... Video Deemphasis/22kHz Digital I/O (STV0056A pin 29) STV0056A 21/26 ...

Page 22

... STV0056A FM DEMODULATION SOFTWARE ROUTINE With the STV0056A circuit, for each channel, three steps are required to acheive a FM demodulation : step :To set the demodulation parameters : FM deviation selection, Subcarrier frequency selection step : To implement a waiting loop to check the actual VCO frequency step :To close the demodulation phase locked loop (PLL) ...

Page 23

... STEP (LEFT) The FM demodulationcan bestarted by connecting the VCO to the phase locked loop (PLL). STV0056A In practice : - SW3 closed SW4 opened After this sequence of 3 steps for left channel, a similar sequence is needed for the right channel. ...

Page 24

... STV0056A TYPICAL APPLICATION (3 SCARTS, PAL/SECAM Europe Apllication) 24/26 ...

Page 25

... Easy parallel connection of the outputs to the scarts without any additional switching hardware. This configuration is possible due to the high impedance mode that can be selected for each audio and video outputs. TUNER Bus TUNER Video Audio 6- 12-14 6 27-28 A Video Audio 2 Video 6-10 Audio 12-14 6 27-28 A STV0056A TV SCART VCR SCART DECODER SCART 25/26 ...

Page 26

... STV0056A PACKAGE MECHANICAL DATA 56 PINS - PLASTIC SHRINK DIP mm Dim. Min Typ A A1 0.51 B 0.35 B1 0.75 C 0.20 D 52.12 D1 – – 13.72 K1 – – K2 – – L 2.54 e1 1.78 N Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use ...