PHD97NQ03LT,118 NXP Semiconductors, PHD97NQ03LT,118 Datasheet - Page 6

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PHD97NQ03LT,118

Manufacturer Part Number
PHD97NQ03LT,118
Description
MOSFET N-CH TRENCH 25V SOT428
Manufacturer
NXP Semiconductors
Series
TrenchMOS™r
Datasheet

Specifications of PHD97NQ03LT,118

Package / Case
DPak, TO-252 (2 leads+tab), SC-63
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
6.3 mOhm @ 25A, 10V
Drain To Source Voltage (vdss)
25V
Current - Continuous Drain (id) @ 25° C
75A
Vgs(th) (max) @ Id
2.15V @ 1mA
Gate Charge (qg) @ Vgs
11.7nC @ 4.5V
Input Capacitance (ciss) @ Vds
1570pF @ 12V
Power - Max
107W
Mounting Type
Surface Mount
Minimum Operating Temperature
- 55 C
Configuration
Single
Transistor Polarity
NPN
Mounting Style
SMD/SMT
Power Dissipation
107 W
Maximum Operating Temperature
+ 175 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
934061139118
NXP Semiconductors
Table 6.
PHD97NQ03LT_1
Product data sheet
Symbol
t
t
t
t
Source-drain diode
V
t
Q
d(on)
r
d(off)
f
rr
Fig 5.
SD
r
V
GS(th)
(V)
1.5
0.5
3
2
1
0
-60
junction temperature
Gate-source threshold voltage as a function of
Characteristics
Parameter
turn-on delay time
rise time
turn-off delay time
fall time
source-drain voltage
reverse recovery time
recovered charge
0
max
typ
min
…continued
60
Conditions
V
R
I
see
I
V
S
S
DS
G(ext)
DS
120
= 25 A; V
= 20 A; dI
Figure 12
= 12 V; R
= 30 V
003aab272
T
j
= 5.6 Ω
(°C)
180
GS
S
Rev. 01 — 24 March 2009
/dt = -100 A/µs; V
L
= 0 V; T
= 0.5 Ω; V
j
= 25 °C;
GS
Fig 6.
= 4.5 V;
(A)
I
10
10
10
10
GS
D
−3
−4
−5
−6
= 0 V;
gate-source voltage
Sub-threshold drain current as a function of
0
N-channel TrenchMOS logic level FET
0.5
1
PHD97NQ03LT
Min
-
-
-
-
-
-
-
min
1.5
Typ
18
33
20
12
0.87
38
14
typ
© NXP B.V. 2009. All rights reserved.
2
003aab271
max
V
Max
-
-
-
-
1.2
-
-
GS
(V)
2.5
Unit
ns
ns
ns
ns
V
ns
nC
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